From patchwork Mon Aug 28 09:57:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 9925075 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6674E60329 for ; Mon, 28 Aug 2017 09:58:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 58107286A3 for ; Mon, 28 Aug 2017 09:58:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4B7E8286AA; Mon, 28 Aug 2017 09:58:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_LOW autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 69C07286A3 for ; Mon, 28 Aug 2017 09:58:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=CgQ+fGLUPVNT6GNTZ5ETFd1h+I35+NIQvC2Z2SVLf7c=; b=dra BkeJJgL/5cgeyIQHY7zWmY4lPN82ncUsVMN2qiEIJ/IBFWSsU630tbMWGsDX13O9dvZLa0yKD9ewx ebaV0BX0rbEoqtPeSracYlnMyIKw+iF8MkHHhVGB5aWVDPHS4VRqPElk+GxpjCEtb0zngTeKDyzVa 40kNRryVnS8NohVuv3Y3mBFaF2bEwGo+gfidTfrCIttgI+ufLG4CVsJDVjU1ShiOs12dbpM0KEkoP 3jU+AOiPouWlucVCZysJXsLr3vHbGGuZbPhoDaX9H0V0bkLj8VqZ1enalP5WbRgJuHalB8bi/zxOe NRpuUJoeif8bzajriLjXag1Ol/LOMQg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dmGoE-00022O-Vy; Mon, 28 Aug 2017 09:58:19 +0000 Received: from mx.socionext.com ([202.248.49.38]) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dmGoB-0001wU-9R for linux-arm-kernel@lists.infradead.org; Mon, 28 Aug 2017 09:58:17 +0000 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 28 Aug 2017 18:57:51 +0900 Received: from mail.mfilter.local (unknown [10.213.24.62]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id 12040180B41; Mon, 28 Aug 2017 18:57:51 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Mon, 28 Aug 2017 18:57:51 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id 77DA91A0E11; Mon, 28 Aug 2017 18:57:50 +0900 (JST) From: Kunihiko Hayashi To: linux-clk@vger.kernel.org Subject: [PATCH] clk: uniphier: add ethernet clock control support Date: Mon, 28 Aug 2017 18:57:23 +0900 Message-Id: <1503914243-24518-1-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170828_025815_461804_AED7CD72 X-CRM114-Status: UNSURE ( 6.54 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kunihiko Hayashi , masami.hiramatsu@linaro.org, jaswinder.singh@linaro.org, mturquette@baylibre.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, yamada.masahiro@socionext.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add clock control for ethernet controller on Pro4, PXs2, LD11 and LD20. Signed-off-by: Kunihiko Hayashi Acked-by: Masahiro Yamada --- drivers/clk/uniphier/clk-uniphier-sys.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index 6fcf781..01da141 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -57,6 +57,12 @@ #define UNIPHIER_PRO4_SYS_CLK_USB3(idx, ch) \ UNIPHIER_CLK_GATE("usb3" #ch, (idx), NULL, 0x2104, 16 + (ch)) +#define UNIPHIER_PRO4_SYS_CLK_ETHER(idx) \ + UNIPHIER_CLK_GATE("ether", (idx), NULL, 0x2104, 12) + +#define UNIPHIER_LD11_SYS_CLK_ETHER(idx) \ + UNIPHIER_CLK_GATE("ether", (idx), NULL, 0x210c, 6) + const struct uniphier_clk_data uniphier_ld4_sys_clk_data[] = { UNIPHIER_CLK_FACTOR("spll", -1, "ref", 65, 1), /* 1597.44 MHz */ UNIPHIER_CLK_FACTOR("upll", -1, "ref", 6000, 512), /* 288 MHz */ @@ -81,6 +87,7 @@ const struct uniphier_clk_data uniphier_pro4_sys_clk_data[] = { UNIPHIER_LD4_SYS_CLK_NAND(2), UNIPHIER_LD4_SYS_CLK_SD, UNIPHIER_CLK_FACTOR("usb2", -1, "upll", 1, 12), + UNIPHIER_PRO4_SYS_CLK_ETHER(6), UNIPHIER_LD4_SYS_CLK_STDMAC(8), /* HSC, MIO, RLE */ UNIPHIER_PRO4_SYS_CLK_GIO(12), /* Ether, SATA, USB3 */ UNIPHIER_PRO4_SYS_CLK_USB3(14, 0), @@ -122,6 +129,7 @@ const struct uniphier_clk_data uniphier_pxs2_sys_clk_data[] = { UNIPHIER_CLK_FACTOR("i2c", 1, "spll", 1, 48), UNIPHIER_PRO5_SYS_CLK_NAND(2), UNIPHIER_PRO5_SYS_CLK_SD, + UNIPHIER_PRO4_SYS_CLK_ETHER(6), UNIPHIER_LD4_SYS_CLK_STDMAC(8), /* HSC, RLE */ /* GIO is always clock-enabled: no function for 0x2104 bit6 */ UNIPHIER_PRO4_SYS_CLK_USB3(14, 0), @@ -142,6 +150,7 @@ const struct uniphier_clk_data uniphier_ld11_sys_clk_data[] = { UNIPHIER_LD11_SYS_CLK_NAND(2), UNIPHIER_LD11_SYS_CLK_EMMC(4), /* Index 5 reserved for eMMC PHY */ + UNIPHIER_LD11_SYS_CLK_ETHER(6), UNIPHIER_LD11_SYS_CLK_STDMAC(8), /* HSC, MIO */ UNIPHIER_CLK_FACTOR("usb2", -1, "ref", 24, 25), /* CPU gears */ @@ -171,6 +180,7 @@ const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] = { UNIPHIER_LD11_SYS_CLK_EMMC(4), /* Index 5 reserved for eMMC PHY */ UNIPHIER_LD20_SYS_CLK_SD, + UNIPHIER_LD11_SYS_CLK_ETHER(6), UNIPHIER_LD11_SYS_CLK_STDMAC(8), /* HSC */ /* GIO is always clock-enabled: no function for 0x210c bit5 */ /*