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bh=gNgVrziTzNU4vspHdtfednqs89DJ0lB7ktLACCHFGp8=; b=IL3VQi4C8BthK+WeCbajO9Q5jK0uJERKRDd9R9z5mVlcQ7B/8HJMCmvQJ71b1es/rk /Jx3SH8wKELNbUzGMqTnKShAmYTtfqY/nppSzuY3GXCXJfH2dGXAJoXL0fo33HBi7Y5d vnlOoUBT4/qAc/tyA6mmtN1cfdArRNp8XvfBYH9aFbb2Bio+tjUW13whCiXTUuxb2aCI M4FMIowpud5grxu09wzwnPJ09g840gD5PFjvHNAJ+WZJMcXNHvtYNahmMcV4LUjvvSeS J8N7Kkz2AVcUK0SHqmHZWlYi+DdOo4s47ngzavsYuy8rDkT6+FK5fVB/WhkBRgBwolKv UhXQ== X-Gm-Message-State: AMCzsaUIuz0SBLoyXOzqU7ej6A5lo378pv9X89v2unFM7j0lwLVeov4Y iStXsBTv1Q7OZbaE0CTrJcE= X-Google-Smtp-Source: AOwi7QAO5u79n/JWaStMM2SLozCO9gq6th6ER5feOMcUbnRuAV31lzQZIFT/TGLSLSxeLmGapIkOew== X-Received: by 10.84.225.145 with SMTP id u17mr9471116plj.105.1507564023729; Mon, 09 Oct 2017 08:47:03 -0700 (PDT) Received: from localhost.localdomain ([67.139.187.132]) by smtp.gmail.com with ESMTPSA id y7sm15418897pfy.35.2017.10.09.08.47.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 09 Oct 2017 08:47:03 -0700 (PDT) From: Dan Haab To: Florian Fainelli Subject: [PATCH 1/2] ARM: dts: BCM53573: Add DT for Luxul XAP-810 Date: Mon, 9 Oct 2017 09:46:59 -0600 Message-Id: <1507564020-7394-1-git-send-email-riproute@gmail.com> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171009_084723_044570_10350D75 X-CRM114-Status: GOOD ( 15.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Jon Mason , Hauke Mehrtens , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Russell King , Rob Herring , bcm-kernel-feedback-list@broadcom.com, Dan Haab , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dan Haab This is BCM53573 WiSoC based access point with an extra BCM43217 chipset used for 2.4 GHz. Signed-off-by: Dan Haab Acked-by: Rafał Miłecki --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm47189-luxul-xap-810.dts | 87 ++++++++++++++++++++++++++++ 2 files changed, 88 insertions(+) create mode 100644 arch/arm/boot/dts/bcm47189-luxul-xap-810.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 2d964c9..5cac283 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -110,6 +110,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm953012hr.dtb \ bcm953012k.dtb dtb-$(CONFIG_ARCH_BCM_53573) += \ + bcm47189-luxul-xap-810.dtb \ bcm47189-tenda-ac9.dtb \ bcm947189acdbmr.dtb dtb-$(CONFIG_ARCH_BCM_63XX) += \ diff --git a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts new file mode 100644 index 0000000..214df18 --- /dev/null +++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts @@ -0,0 +1,87 @@ +/* + * Copyright 2017 Luxul Inc. + * + * Licensed under the ISC license. + */ + +/dts-v1/; + +#include "bcm53573.dtsi" + +/ { + compatible = "luxul,xap-810-v1", "brcm,bcm47189", "brcm,bcm53573"; + model = "Luxul XAP-810 V1"; + + chosen { + bootargs = "earlycon"; + }; + + memory { + reg = <0x00000000 0x08000000>; + }; + + leds { + compatible = "gpio-leds"; + + 5ghz { + label = "bcm53xx:blue:5ghz"; + gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-off"; + }; + + system { + label = "bcm53xx:green:system"; + gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "timer"; + }; + }; + + pcie0_leds { + compatible = "gpio-leds"; + + 2ghz { + label = "bcm53xx:blue:2ghz"; + gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-off"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + restart { + label = "Reset"; + linux,code = ; + gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&pcie0 { + ranges = <0x00000000 0 0 0 0 0x00100000>; + #address-cells = <3>; + #size-cells = <2>; + + bridge@0,0,0 { + reg = <0x0000 0 0 0 0>; + ranges = <0x00000000 0 0 0 0 0 0 0x00100000>; + #address-cells = <3>; + #size-cells = <2>; + + wifi@0,1,0 { + reg = <0x0000 0 0 0 0>; + ranges = <0x00000000 0 0 0 0x00100000>; + #address-cells = <1>; + #size-cells = <1>; + + pcie0_chipcommon: chipcommon@0 { + reg = <0 0x1000>; + + gpio-controller; + #gpio-cells = <2>; + }; + }; + }; +};