From patchwork Wed Oct 18 07:43:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 10013929 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 54AB760215 for ; Wed, 18 Oct 2017 07:45:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4662928620 for ; Wed, 18 Oct 2017 07:45:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3B36328AFB; Wed, 18 Oct 2017 07:45:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B25CE28620 for ; Wed, 18 Oct 2017 07:45:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=s3e/Tj1D9hidmQBeX0M8ht4FcA8cmLSO1JeW3+pNkMg=; b=LfXcdoFASqeOCV9/P47EoM98M/ LZ8VbARUKETAliPaJ8kHlK3CqxG/0HKObGCQJjii1XrlAazRlQtr4J9yo26xhY63b7P83L4anTXMS PPFPxqhm69ay9wFC+xPlXn3ZkeF4FmB5buRFV6LWL1xyZwD8XTBnUqLpvIf2hfnrpKiUbsNjuw7Ya 0Gv3pV8mb/4N6mmTcDyeQVcxq75Nhl1trHcD7n+0WqL6AQL0GKVGnZLB2Dhpq01rbuRj78A/Y3fSf nlfDLTwGGw28lZTBg46UmBQ4Q0a3NDIBSIxd4KhtQw9zORioH+n3GKQBenP7USU5QJtN8pu9Va7Rw 7knuESqg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1e4j2L-0007CR-4U; Wed, 18 Oct 2017 07:45:09 +0000 Received: from mail-wm0-x233.google.com ([2a00:1450:400c:c09::233]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1e4j1b-000678-Ks for linux-arm-kernel@lists.infradead.org; Wed, 18 Oct 2017 07:44:29 +0000 Received: by mail-wm0-x233.google.com with SMTP id f4so8303811wme.0 for ; Wed, 18 Oct 2017 00:44:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2xZrvZ3e33zZlEvHpmSdoaik8mhBtquzrft5bq99r4U=; b=jR7Ezbh3lL/bYJ+8Yja21XSjIai2RRvjXY6A4Q/Hdt9aKyuKi3pm+yDs2F+ndyt87F u5uQT2RSutkUkfhnhQasNQ9s22EqMUnu3PeTcmRVCfi/9LRiCHiBSf0zkOrdXla3XrXm jN0jTsp6clCc8/3xglxcyVciYpWtl/Rpbp9Es= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2xZrvZ3e33zZlEvHpmSdoaik8mhBtquzrft5bq99r4U=; b=PKOFVRUVS5bijQnVTU02FsQdK+uc7tfoJog0h3rbdgrFxk/GIHlcGDq5fAvp0CdVXT vDozhmkUyHgHuxz/oN7PXVBD0M1r+kEirZdum6mPdfnpZxbO2D01FADd00C7zHhoBB09 pcRe8fxcw4NH48G5P8g+1Ohqpu/21J3a24DL7L8kBSSI+S1E1lEdmBituM+MrtLwUhr0 xQODvsWw30lb2sBZzpGFFukd+zGUXY70uamwq3aYEXyh7+qtyfYX60exxJRgWF3Bnqhn HZ/xruR1CLVXX4PCjHZEbrZK6k/xAsQE4t3sBIClEDTzfp+C7bafOwcP06jgbzSnskLD HxmQ== X-Gm-Message-State: AMCzsaVc6iYRawGlTrlAIw/veE5hr6dbI2HavGkIgahfgNdnOVzSjg80 WJN1hwrfTVDfE7S6TSkuyJJSzA== X-Google-Smtp-Source: ABhQp+Q/NJxGdV+O14hcONpZlnm1Ky+Mx/ZNG8Z18XcnC1ZRUx09TCJzB4yMKhcL5h0dBI3tfCi1fQ== X-Received: by 10.28.236.216 with SMTP id h85mr5983536wmi.100.1508312641538; Wed, 18 Oct 2017 00:44:01 -0700 (PDT) Received: from lmecxl0911.lme.st.com ([80.215.78.118]) by smtp.gmail.com with ESMTPSA id v78sm7855063wmv.48.2017.10.18.00.43.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 18 Oct 2017 00:44:01 -0700 (PDT) From: Benjamin Gaignard To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, daniel.lezcano@linaro.org, tglx@linutronix.de, ludovic.barre@st.com Subject: [PATCH v5 4/4] arm: dts: stm32: remove useless clocksource nodes Date: Wed, 18 Oct 2017 09:43:34 +0200 Message-Id: <1508312614-27750-5-git-send-email-benjamin.gaignard@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1508312614-27750-1-git-send-email-benjamin.gaignard@linaro.org> References: <1508312614-27750-1-git-send-email-benjamin.gaignard@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171018_004424_225409_31272D48 X-CRM114-Status: UNSURE ( 8.73 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Benjamin Gaignard , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP 16 bits timers aren't accurate enough to be used as clocksource, remove them from stm32f4 and stm32f7 devicetree. Signed-off-by: Benjamin Gaignard --- arch/arm/boot/dts/stm32f429.dtsi | 32 -------------------------------- arch/arm/boot/dts/stm32f746.dtsi | 32 -------------------------------- 2 files changed, 64 deletions(-) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index dd7e99b..ac9a3e6 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -108,14 +108,6 @@ }; }; - timer3: timer@40000400 { - compatible = "st,stm32-timer"; - reg = <0x40000400 0x400>; - interrupts = <29>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>; - status = "disabled"; - }; - timers3: timers@40000400 { #address-cells = <1>; #size-cells = <0>; @@ -137,14 +129,6 @@ }; }; - timer4: timer@40000800 { - compatible = "st,stm32-timer"; - reg = <0x40000800 0x400>; - interrupts = <30>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>; - status = "disabled"; - }; - timers4: timers@40000800 { #address-cells = <1>; #size-cells = <0>; @@ -194,14 +178,6 @@ }; }; - timer6: timer@40001000 { - compatible = "st,stm32-timer"; - reg = <0x40001000 0x400>; - interrupts = <54>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM6)>; - status = "disabled"; - }; - timers6: timers@40001000 { #address-cells = <1>; #size-cells = <0>; @@ -218,14 +194,6 @@ }; }; - timer7: timer@40001400 { - compatible = "st,stm32-timer"; - reg = <0x40001400 0x400>; - interrupts = <55>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM7)>; - status = "disabled"; - }; - timers7: timers@40001400 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi index 5633860..a9077e6 100644 --- a/arch/arm/boot/dts/stm32f746.dtsi +++ b/arch/arm/boot/dts/stm32f746.dtsi @@ -82,22 +82,6 @@ status = "disabled"; }; - timer3: timer@40000400 { - compatible = "st,stm32-timer"; - reg = <0x40000400 0x400>; - interrupts = <29>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>; - status = "disabled"; - }; - - timer4: timer@40000800 { - compatible = "st,stm32-timer"; - reg = <0x40000800 0x400>; - interrupts = <30>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>; - status = "disabled"; - }; - timer5: timer@40000c00 { compatible = "st,stm32-timer"; reg = <0x40000c00 0x400>; @@ -105,22 +89,6 @@ clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>; }; - timer6: timer@40001000 { - compatible = "st,stm32-timer"; - reg = <0x40001000 0x400>; - interrupts = <54>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>; - status = "disabled"; - }; - - timer7: timer@40001400 { - compatible = "st,stm32-timer"; - reg = <0x40001400 0x400>; - interrupts = <55>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM7)>; - status = "disabled"; - }; - rtc: rtc@40002800 { compatible = "st,stm32-rtc"; reg = <0x40002800 0x400>;