From patchwork Wed Oct 25 17:11:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ludovic BARRE X-Patchwork-Id: 10027099 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 186BD601E8 for ; Wed, 25 Oct 2017 17:28:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EE15728BF4 for ; Wed, 25 Oct 2017 17:28:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E2A2928BFB; Wed, 25 Oct 2017 17:28:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4A25D28BF4 for ; Wed, 25 Oct 2017 17:28:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LkLNidekaIG294/Mr5ekKIvvaL0Rt9yYeG882u2pU2o=; b=P3nvBTdsBQABvb MEe9mNZbfAuNWA+Z5+5l+YKS0H9QbOLQUbWcCzTA2un5buHy88hPy+W/sN+Ez5PBnCiChoZONtbb1 bbRDYlzw2O4GKc2sdvVo7Tz7qrEe4DAotLn+RGkuzimpuIjr1DUfASvd0DP5D+KKz3KgNF72/sqF+ WViFtptFCDKuwWzKJbZXGqZeCtBICWbN8gNo1aLyuy4EEyURSFjxJ403k2RQnEFphZLIb82TuO4kP G24SCpyyP3Ey8/lS1SUgf1NXfH3ssTx28bAmdifoKzUvMBdEZV431ADtIP0yc+VlIKkSPFHyQCKVW 7yS7rpO+zo7yLqyQH5sg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1e7PU9-0002l3-Bc; Wed, 25 Oct 2017 17:28:57 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93] helo=mx07-00178001.pphosted.com) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1e7PDY-0000Tz-7q for linux-arm-kernel@lists.infradead.org; Wed, 25 Oct 2017 17:11:55 +0000 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v9PGx3fH021781; Wed, 25 Oct 2017 19:11:20 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2dtg3dmrwc-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 25 Oct 2017 19:11:20 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 747603F; Wed, 25 Oct 2017 17:11:17 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas22.st.com [10.75.90.92]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 51FD129E3; Wed, 25 Oct 2017 17:11:17 +0000 (GMT) Received: from SAFEX1HUBCAS21.st.com (10.75.90.44) by Safex1hubcas22.st.com (10.75.90.92) with Microsoft SMTP Server (TLS) id 14.3.352.0; Wed, 25 Oct 2017 19:11:17 +0200 Received: from lmecxl0923.lme.st.com (10.48.0.237) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.352.0; Wed, 25 Oct 2017 19:11:16 +0200 From: Ludovic Barre To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring Subject: [PATCH v2 9/9] ARM: dts: stm32: add support of exti on stm32h743 pinctrl Date: Wed, 25 Oct 2017 19:11:05 +0200 Message-ID: <1508951465-17152-10-git-send-email-ludovic.Barre@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1508951465-17152-1-git-send-email-ludovic.Barre@st.com> References: <1508951465-17152-1-git-send-email-ludovic.Barre@st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.0.237] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-10-25_10:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171025_101148_615233_4368F396 X-CRM114-Status: UNSURE ( 8.30 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Alexandre Torgue , Maxime Coquelin , linux-kernel@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ludovic Barre This patch adds support of external interrupt (exti) on all gpio ports of stm32h743. Signed-off-by: Ludovic Barre --- arch/arm/boot/dts/stm32h743-pinctrl.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/stm32h743-pinctrl.dtsi b/arch/arm/boot/dts/stm32h743-pinctrl.dtsi index 76bbd65..df0b441 100644 --- a/arch/arm/boot/dts/stm32h743-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32h743-pinctrl.dtsi @@ -49,6 +49,8 @@ #size-cells = <1>; compatible = "st,stm32h743-pinctrl"; ranges = <0 0x58020000 0x3000>; + interrupt-parent = <&exti>; + st,syscfg = <&syscfg 0x8>; pins-are-numbered; gpioa: gpio@58020000 { @@ -57,6 +59,8 @@ reg = <0x0 0x400>; clocks = <&timer_clk>; st,bank-name = "GPIOA"; + interrupt-controller; + #interrupt-cells = <2>; }; gpiob: gpio@58020400 { @@ -65,6 +69,8 @@ reg = <0x400 0x400>; clocks = <&timer_clk>; st,bank-name = "GPIOB"; + interrupt-controller; + #interrupt-cells = <2>; }; gpioc: gpio@58020800 { @@ -73,6 +79,8 @@ reg = <0x800 0x400>; clocks = <&timer_clk>; st,bank-name = "GPIOC"; + interrupt-controller; + #interrupt-cells = <2>; }; gpiod: gpio@58020c00 { @@ -81,6 +89,8 @@ reg = <0xc00 0x400>; clocks = <&timer_clk>; st,bank-name = "GPIOD"; + interrupt-controller; + #interrupt-cells = <2>; }; gpioe: gpio@58021000 { @@ -89,6 +99,8 @@ reg = <0x1000 0x400>; clocks = <&timer_clk>; st,bank-name = "GPIOE"; + interrupt-controller; + #interrupt-cells = <2>; }; gpiof: gpio@58021400 { @@ -97,6 +109,8 @@ reg = <0x1400 0x400>; clocks = <&timer_clk>; st,bank-name = "GPIOF"; + interrupt-controller; + #interrupt-cells = <2>; }; gpiog: gpio@58021800 { @@ -105,6 +119,8 @@ reg = <0x1800 0x400>; clocks = <&timer_clk>; st,bank-name = "GPIOG"; + interrupt-controller; + #interrupt-cells = <2>; }; gpioh: gpio@58021c00 { @@ -113,6 +129,8 @@ reg = <0x1c00 0x400>; clocks = <&timer_clk>; st,bank-name = "GPIOH"; + interrupt-controller; + #interrupt-cells = <2>; }; gpioi: gpio@58022000 { @@ -121,6 +139,8 @@ reg = <0x2000 0x400>; clocks = <&timer_clk>; st,bank-name = "GPIOI"; + interrupt-controller; + #interrupt-cells = <2>; }; gpioj: gpio@58022400 { @@ -129,6 +149,8 @@ reg = <0x2400 0x400>; clocks = <&timer_clk>; st,bank-name = "GPIOJ"; + interrupt-controller; + #interrupt-cells = <2>; }; gpiok: gpio@58022800 { @@ -137,6 +159,8 @@ reg = <0x2800 0x400>; clocks = <&timer_clk>; st,bank-name = "GPIOK"; + interrupt-controller; + #interrupt-cells = <2>; }; usart1_pins: usart1@0 {