| Message ID | 1515377863-20358-21-git-send-email-david@lechnology.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Monday 08 January 2018 07:47 AM, David Lechner wrote: > This adds a new binding for TI DA8XX USB PHY clocks. These clocks are part > of a syscon register called CFGCHIP3. CFGCHIP2 > > Signed-off-by: David Lechner <david@lechnology.com> > +Examples: > + > + cfgchip: syscon@1417c { > + compatible = "ti,da830-cfgchip", "syscon", "simple-mfd"; > + reg = <0x1417c 0x14>; > + > + usb0_phy_clk: usb0-phy-clock { > + compatible = "ti,da830-usb0-phy-clock"; > + #clock-cells = <0>; > + clocks = <&usb_refclkin>, <&pll0_aux_clk>, <&psc1 1>; > + clock-names = "usb_refclkin", "auxclk", "usb0_lpsc"; > + clock-output-names = "usb0_phy_clk"; Probably call this "usb0_phy" to match with the input name used for usb1_phy_clk? > + }; > + > + usb1_phy_clk: usb1-phy-clock { > + compatible = "ti,da830-usb1-phy-clock"; > + #clock-cells = <0>; > + clocks = <&usb0_phy_clk>, <&usb_refclkin>; > + clock-names = "usb0_phy", "usb_refclkin"; > + clock-output-names = "usb1_phy_clk"; > + }; > + }; Thanks, Sekhar
On 01/18/2018 06:10 AM, Sekhar Nori wrote: > On Monday 08 January 2018 07:47 AM, David Lechner wrote: >> This adds a new binding for TI DA8XX USB PHY clocks. These clocks are part >> of a syscon register called CFGCHIP3. > > CFGCHIP2 > >> >> Signed-off-by: David Lechner <david@lechnology.com> > >> +Examples: >> + >> + cfgchip: syscon@1417c { >> + compatible = "ti,da830-cfgchip", "syscon", "simple-mfd"; >> + reg = <0x1417c 0x14>; >> + >> + usb0_phy_clk: usb0-phy-clock { >> + compatible = "ti,da830-usb0-phy-clock"; >> + #clock-cells = <0>; >> + clocks = <&usb_refclkin>, <&pll0_aux_clk>, <&psc1 1>; >> + clock-names = "usb_refclkin", "auxclk", "usb0_lpsc"; >> + clock-output-names = "usb0_phy_clk"; > > Probably call this "usb0_phy" to match with the input name used for > usb1_phy_clk? I was planning on just dropping clock-output-names altogether actually since they don't really do anything useful. Also, I was considering sending a series to change the con_id for the PHY clocks. My current revision of the device tree bindings is looking like this: usb_phy: usb-phy { compatible = "ti,da830-usb-phy"; #phy-cells = <1>; clocks = <&usb_phy_clk 0>, <&usb_phy_clk 1>; clock-names = "usb20_phy", "usb11_phy"; status = "disabled"; }; usb_phy_clk: usb-phy-clocks { compatible = "ti,da830-usb-phy-clocks"; #clock-cells = <1>; clocks = <&psc1 1>, <&usb_refclkin>, <&pll0_auxclk>; clock-names = "fck", "usb_refclkin", "auxclk"; }; The clock-names = "usb20_phy", "usb11_phy" comes from the existing con_ids in the PHY driver's clk_get()s. However, in device tree, we are usually referring to the USB devices as usb0 and usb1 instead of usb20 and usb11, respectively. Figure 6-2 "USB Clocking Diagram" in spruh82c.pdf (AM1808 TRM) calls these clocks "CLK48" and "CLK48MHz from USB 2.0 PHY", so I was thinking of changing the con_ids (and therefore also clock-names) to "usb0_clk48" and "usb1_clk48".
On Friday 19 January 2018 12:30 AM, David Lechner wrote: > On 01/18/2018 06:10 AM, Sekhar Nori wrote: >> On Monday 08 January 2018 07:47 AM, David Lechner wrote: >>> This adds a new binding for TI DA8XX USB PHY clocks. These clocks are >>> part >>> of a syscon register called CFGCHIP3. >> >> CFGCHIP2 >> >>> >>> Signed-off-by: David Lechner <david@lechnology.com> >> >>> +Examples: >>> + >>> + cfgchip: syscon@1417c { >>> + compatible = "ti,da830-cfgchip", "syscon", "simple-mfd"; >>> + reg = <0x1417c 0x14>; >>> + >>> + usb0_phy_clk: usb0-phy-clock { >>> + compatible = "ti,da830-usb0-phy-clock"; >>> + #clock-cells = <0>; >>> + clocks = <&usb_refclkin>, <&pll0_aux_clk>, <&psc1 1>; >>> + clock-names = "usb_refclkin", "auxclk", "usb0_lpsc"; >>> + clock-output-names = "usb0_phy_clk"; >> >> Probably call this "usb0_phy" to match with the input name used for >> usb1_phy_clk? > > I was planning on just dropping clock-output-names altogether actually > since they don't really do anything useful. > > Also, I was considering sending a series to change the con_id for the > PHY clocks. > > My current revision of the device tree bindings is looking like this: > > usb_phy: usb-phy { > compatible = "ti,da830-usb-phy"; > #phy-cells = <1>; > clocks = <&usb_phy_clk 0>, <&usb_phy_clk 1>; > clock-names = "usb20_phy", "usb11_phy"; > status = "disabled"; > }; > usb_phy_clk: usb-phy-clocks { > compatible = "ti,da830-usb-phy-clocks"; > #clock-cells = <1>; > clocks = <&psc1 1>, <&usb_refclkin>, <&pll0_auxclk>; > clock-names = "fck", "usb_refclkin", "auxclk"; > }; > > The clock-names = "usb20_phy", "usb11_phy" comes from the existing con_ids > in the PHY driver's clk_get()s. > > However, in device tree, we are usually referring to the USB devices as > usb0 and usb1 instead of usb20 and usb11, respectively. Figure 6-2 "USB > Clocking Diagram" in spruh82c.pdf (AM1808 TRM) calls these clocks "CLK48" > and "CLK48MHz from USB 2.0 PHY", so I was thinking of changing the con_ids > (and therefore also clock-names) to "usb0_clk48" and "usb1_clk48". This is fine with me. Thanks, Sekhar
diff --git a/Documentation/devicetree/bindings/clock/ti/davinci/da8xx-cfgchip-usb-phy.txt b/Documentation/devicetree/bindings/clock/ti/davinci/da8xx-cfgchip-usb-phy.txt new file mode 100644 index 0000000..8a12e1b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/ti/davinci/da8xx-cfgchip-usb-phy.txt @@ -0,0 +1,55 @@ +Binding for TI DA8XX/OMAP-L13X/AM17XX/AM18XX CFGCHIP USB PHY clocks + +TI DA8XX/OMAP-L13X/AM17XX/AM18XX SoCs contain a general purpose set of +registers call CFGCHIPn. Some of these registers function as the USB PHY +clocks. This document describes the bindings for those clocks. + +Required properties: +- compatible: shall be one of: + - "ti,da830-usb0-phy-clock" for the USB 2.0 PHY + - "ti,da830-usb1-phy-clock" for the USB 1.1 PHY +- #clock-cells: from common clock binding; shall be set to 0. +- clocks: phandle list of clocks corresponding to clock-names +- clock-names: depends on compatible: + - for "ti,da830-usb0-phy-clock" must be "usb_refclkin", "auxclk", + "usb0_lpsc" + - for "ti,da830-usb1-phy-clock" must be "usb0_phy", "usb_refclkin" + +Optional properties: +- clock-output-names: from common clock binding. + +Parent: + This node must be a child of a "ti,da830-cfgchip" node. + +Assignment: + The assigned-clocks and assigned-clock-parents properties from the + common clock bindings can be used to indicate which parent clock should + be used. Note: for "ti,da830-usb0-phy-clock", only "usb_refclkin" or + "auxclk" can be used as the assigned parent clock ("usb0_lpsc" is not + an actual parent clock and only used internally). + +Examples: + + cfgchip: syscon@1417c { + compatible = "ti,da830-cfgchip", "syscon", "simple-mfd"; + reg = <0x1417c 0x14>; + + usb0_phy_clk: usb0-phy-clock { + compatible = "ti,da830-usb0-phy-clock"; + #clock-cells = <0>; + clocks = <&usb_refclkin>, <&pll0_aux_clk>, <&psc1 1>; + clock-names = "usb_refclkin", "auxclk", "usb0_lpsc"; + clock-output-names = "usb0_phy_clk"; + }; + + usb1_phy_clk: usb1-phy-clock { + compatible = "ti,da830-usb1-phy-clock"; + #clock-cells = <0>; + clocks = <&usb0_phy_clk>, <&usb_refclkin>; + clock-names = "usb0_phy", "usb_refclkin"; + clock-output-names = "usb1_phy_clk"; + }; + }; + +Also see: +- Documentation/devicetree/bindings/clock/clock-bindings.txt
This adds a new binding for TI DA8XX USB PHY clocks. These clocks are part of a syscon register called CFGCHIP3. Signed-off-by: David Lechner <david@lechnology.com> --- .../clock/ti/davinci/da8xx-cfgchip-usb-phy.txt | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/ti/davinci/da8xx-cfgchip-usb-phy.txt