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Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:53590 helo=freyr.lechnology.com) by vern.gendns.com with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-SHA256:128) (Exim 4.89_1) (envelope-from ) id 1ecwiu-00059q-Ag; Sat, 20 Jan 2018 12:14:32 -0500 From: David Lechner To: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v6 03/41] clk: davinci: Add platform information for TI DA830 PLL Date: Sat, 20 Jan 2018 11:13:42 -0600 Message-Id: <1516468460-4908-4-git-send-email-david@lechnology.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516468460-4908-1-git-send-email-david@lechnology.com> References: <1516468460-4908-1-git-send-email-david@lechnology.com> X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - lists.infradead.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180120_171616_680934_6595F899 X-CRM114-Status: GOOD ( 16.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , David Lechner , Kevin Hilman , Stephen Boyd , Michael Turquette , Sekhar Nori , linux-kernel@vger.kernel.org, Bartosz Golaszewski , Rob Herring , Adam Ford MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This adds platform-specific declarations for the PLL clocks on TI DA830/ OMAP-L137/AM17XX SoCs. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori --- v6 changes: - Added da830_pll_info with controller-specific information - Add empty lines between function calls drivers/clk/davinci/Makefile | 1 + drivers/clk/davinci/pll-da830.c | 51 +++++++++++++++++++++++++++++++++++++++++ include/linux/clk/davinci.h | 14 +++++++++++ 3 files changed, 66 insertions(+) create mode 100644 drivers/clk/davinci/pll-da830.c create mode 100644 include/linux/clk/davinci.h diff --git a/drivers/clk/davinci/Makefile b/drivers/clk/davinci/Makefile index d9673bd..9061e19 100644 --- a/drivers/clk/davinci/Makefile +++ b/drivers/clk/davinci/Makefile @@ -2,4 +2,5 @@ ifeq ($(CONFIG_COMMON_CLK), y) obj-y += pll.o +obj-$(CONFIG_ARCH_DAVINCI_DA830) += pll-da830.o endif diff --git a/drivers/clk/davinci/pll-da830.c b/drivers/clk/davinci/pll-da830.c new file mode 100644 index 0000000..548eb73 --- /dev/null +++ b/drivers/clk/davinci/pll-da830.c @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PLL clock descriptions for TI DA830/OMAP-L137/AM17XX + * + * Copyright (C) 2018 David Lechner + */ + +#include +#include +#include + +#include "pll.h" + +static const struct davinci_pll_clk_info da830_pll_info __initconst = { + .name = "pll0", + .pllm_mask = GENMASK(4, 0), + .pllm_min = 4, + .pllm_max = 32, + .pllout_min_rate = 300000000, + .pllout_max_rate = 600000000, + .flags = PLL_HAS_OSCIN | PLL_HAS_PREDIV | PLL_HAS_POSTDIV, +}; + +/* + * NB: Technically, the clocks flagged as SYSCLK_FIXED_DIV are "fixed ratio", + * meaning that we could change the divider as long as we keep the correct + * ratio between all of the clocks, but we don't support that because there is + * currently not a need for it. + */ + +static const struct davinci_pll_sysclk_info da830_pll_sysclk_info[] __initconst = { + SYSCLK(2, pll0_sysclk2, pll0_pllen, 5, SYSCLK_FIXED_DIV), + SYSCLK(3, pll0_sysclk3, pll0_pllen, 5, 0), + SYSCLK(4, pll0_sysclk4, pll0_pllen, 5, SYSCLK_FIXED_DIV), + SYSCLK(5, pll0_sysclk5, pll0_pllen, 5, 0), + SYSCLK(6, pll0_sysclk6, pll0_pllen, 5, SYSCLK_FIXED_DIV), + SYSCLK(7, pll0_sysclk7, pll0_pllen, 5, 0), + { } +}; + +void __init da830_pll_clk_init(void __iomem *pll) +{ + const struct davinci_pll_sysclk_info *info; + + davinci_pll_clk_register(&da830_pll_info, "ref_clk", pll); + + davinci_pll_auxclk_register("pll0_auxclk", pll); + + for (info = da830_pll_sysclk_info; info->name; info++) + davinci_pll_sysclk_register(info, pll); +} diff --git a/include/linux/clk/davinci.h b/include/linux/clk/davinci.h new file mode 100644 index 0000000..4f4d60d --- /dev/null +++ b/include/linux/clk/davinci.h @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * TI Davinci clocks + * + * Copyright (C) 2017 David Lechner + */ +#ifndef __LINUX_CLK_DAVINCI_H__ +#define __LINUX_CLK_DAVINCI_H__ + +#include + +void da830_pll_clk_init(void __iomem *pll); + +#endif /* __LINUX_CLK_DAVINCI_H__ */