From patchwork Mon Jan 22 07:25:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 10178275 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DFBAF60224 for ; Mon, 22 Jan 2018 11:25:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D353826212 for ; Mon, 22 Jan 2018 11:25:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C761726E54; Mon, 22 Jan 2018 11:25:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAD_ENC_HEADER,BAYES_00, DKIM_SIGNED, DKIM_VALID, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B214E26212 for ; Mon, 22 Jan 2018 11:25:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tn1czN63L4ucs5+NE/2eZ19egV9qr9S+wUS6yYgsVhc=; b=TCaXppIMw70+YL alH+k4ZeRQdnfcN23exXEjHDy9RCC7rX59pmZKe92EBq+5FcwbrK1c5nG3K5tpX/W7/3qyrCkw09n 1LLPDsbeZV+TJEgD57Kj/yrxBdGjdd6QUWz4EM/4MU09tRYZViM6v5DO9fAsh1VkfDaYsn7r2oF5/ ZXTe14k3tKw7b8qtnaJamaqGqc0VG9Ro939g0cGFn9MhbeiEnNqTpy+opfpEibc7rx7OLkhj1lGgY vwOWPAZVp7Pr1G9Z50XNkxwjWrRfsIWXexK0N1wI3jzGEWhUSq0pbk3/PT5PuZt7pLkDyV+LCl24c 3IREn1xEJzw+JkbUwkvg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.89 #1 (Red Hat Linux)) id 1edaE5-0000Jg-Ix; Mon, 22 Jan 2018 11:25:21 +0000 Received: from mail-sn1nam02on0081.outbound.protection.outlook.com ([104.47.36.81] helo=NAM02-SN1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.89 #1 (Red Hat Linux)) id 1edaDm-00074K-3W for linux-arm-kernel@lists.infradead.org; Mon, 22 Jan 2018 11:25:05 +0000 Received: from MWHPR03CA0013.namprd03.prod.outlook.com (10.175.133.151) by MWHPR03MB2701.namprd03.prod.outlook.com (10.168.207.135) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.428.17; Mon, 22 Jan 2018 11:24:47 +0000 Received: from BL2FFO11FD037.protection.gbl (2a01:111:f400:7c09::105) by MWHPR03CA0013.outlook.office365.com (2603:10b6:300:117::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.428.17 via Frontend Transport; Mon, 22 Jan 2018 11:24:47 +0000 Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=nxp.com; lists.infradead.org; dkim=none (message not signed) header.d=none;lists.infradead.org; dmarc=fail action=none header.from=nxp.com; Received-SPF: Fail (protection.outlook.com: domain of nxp.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Received: from tx30smr01.am.freescale.net (192.88.168.50) by BL2FFO11FD037.mail.protection.outlook.com (10.173.161.133) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.20.428.12 via Frontend Transport; Mon, 22 Jan 2018 11:24:46 +0000 Received: from shlinux2.ap.freescale.net (shlinux2.ap.freescale.net [10.192.224.44]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id w0M7QR73021564; Mon, 22 Jan 2018 00:26:33 -0700 From: Anson Huang To: , , , , , , , , Subject: [PATCH 2/2] thermal: imx: add i.MX7 thermal sensor support Date: Mon, 22 Jan 2018 15:25:49 +0800 Message-ID: <1516605949-14663-2-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516605949-14663-1-git-send-email-Anson.Huang@nxp.com> References: <1516605949-14663-1-git-send-email-Anson.Huang@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131610938876048384; (91ab9b29-cfa4-454e-5278-08d120cd25b8); () X-Forefront-Antispam-Report: CIP:192.88.168.50; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(346002)(376002)(396003)(39380400002)(39860400002)(2980300002)(1110001)(1109001)(339900001)(199004)(189003)(2201001)(105606002)(86362001)(305945005)(104016004)(106466001)(97736004)(2950100002)(356003)(51416003)(36756003)(16586007)(6636002)(6666003)(5660300001)(68736007)(47776003)(53936002)(8676002)(54906003)(316002)(76176011)(81156014)(48376002)(81166006)(2906002)(110136005)(50226002)(85426001)(72206003)(26005)(50466002)(77096007)(336011)(59450400001)(8936002)(4326008)(498600001); DIR:OUT; SFP:1101; SCL:1; SRVR:MWHPR03MB2701; H:tx30smr01.am.freescale.net; FPR:; SPF:Fail; PTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; X-Microsoft-Exchange-Diagnostics: 1; BL2FFO11FD037; 1:KPnDCV9FeBjU2/2HvNjoQ1FAY0hgIPOpK6aWBtko2uVW0o+ZScjfjYHHLw//K7sfK+coutAZH2WIOZ1dN2KliB8VMc9YQOc4ILsI8sL6rokM2quEyWmzi7RokIzj7O62 MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 28c8d08e-e32d-4d95-c797-08d5618abea4 X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(7020095)(5600026)(4604075)(2017052603307); SRVR:MWHPR03MB2701; X-Microsoft-Exchange-Diagnostics: 1; MWHPR03MB2701; 3:4znEaS99U6d7p9oDjZzDGc1Y3J1f7B85DoxJza4V2EHjLbLyrqGbHT/zqWXOv3VtXIHJfg1LG482i33Otm5lsRSjz1MhMjKzKkh2jjLiG3KIGiBczYN+gI9pAdJL8G+FAS782QG+QMLtO5G5Bgrhv87s7yYdOfgxgKeWkvvRfFcCZ+YQ0FB/TUKUNGAnwJQplHuHDuU8rPkuni1+bP+AggC0ETJFSDWcZxvDsVAf/LDqo1wST+hapyqcj61p2smDoxQr3d1TCJeFnICq0Vvp6H06VYkWoMcpmaWD/fuBjsBgI9K0vKZpo/EOROM2fsP2mpu8u97/ZhP0/CvfzhDZC9GBNbIpDkI4tEdrvZdjyaI=; 25:v/FYR134ecDHiRMbFt44yxXlrDtm9U80Wg8p8xlZP9oK+ZOJHSXpxt8lS1AIQ4AazU0DcgILjJmOt9Psl5oAJuUGkJdyeiPm9Ds3OgCPm/uTLiXRoTEr+2hccFNvaYDKHtGqBOR6H5OYQttK4uN8vzqHJ7DSAeu/rg9hWSerw0SAll6OsTbb9OnTsboUrTMRaPOjR3WpXw/C0CyYvMUvhv+MEcmPMeS3TxgYG8x6eP++2kwm5wUJJXHQIxljzgQnRkQJ1LWspLWXDZ+XzpNGlKsp+SqIDMGQc5DzDfhJpEHPraQbhFFKQ2lT+71xW8BYr1Qe5J6IqHfTJyu+BGv8KQ== X-MS-TrafficTypeDiagnostic: MWHPR03MB2701: X-Microsoft-Exchange-Diagnostics: 1; MWHPR03MB2701; 31:BilkH+g9gTjtt+aoC3wWjOkBxK1ebpw9bJthTkck4BJsOF5yAFjfW0YhDSTD7ZPtotDmFSUtT+ZuS/T9tmWcmFS08SEjCT8jcyJv5fm9XUG6a9PQ36JR0vxfv+oPTmF95iEmMfTlSiOSSj5UfrrO92d/FUc9hOkmEVCowy9Ei47zVCvU58I0bYUtUzW3TrACnNnz1sybRKbiFttH2HuX7EiyW47togXKjw2cfpnKtsk=; 4:3NyJb5A5ob4fU4RWNne7G7weURzHnvAJn8Xuxf8iSOQ+/KpS7Kpytj+iIBTyG6Jce8q8lKlc2wvj0+ubEUKBEXW+mCoPTds9jrw8amqUoYNh5rbhmYlxP6wtiw8Wgz9CL9Lb8tlEMdA1I7DpYPBeT0FZ/EC8K3Jd+n/t/3swk/1A5TToGurpqxtr/anK8PkEc7alZnFh/x5uQIcbJDcA4AJ33FhWcAzl1uGgE2oTnvKs5FhurBut8JlUUS3NAzLCt54p19fSSZoKpEDcENIYqsjXT8d9BYguZ6DMGsbvNKOVMEtN/v+o5VCDxSlyHZdn X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(185117386973197); X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(6095135)(2401047)(8121501046)(5005006)(3002001)(10201501046)(93006095)(93001095)(3231023)(2400081)(944501161)(6055026)(6096035)(20161123556025)(20161123565025)(20161123561025)(20161123563025)(20161123559100)(201703131430075)(201703131433075)(201703131448075)(201703151042153)(201708071742011); SRVR:MWHPR03MB2701; BCL:0; PCL:0; RULEID:(100000803101)(100110400095)(400006); SRVR:MWHPR03MB2701; X-Forefront-PRVS: 0560A2214D X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; MWHPR03MB2701; 23:pQr0pCB13SQw3BC4Kapx0+FylIJKYGBPdISHzayRD?= =?us-ascii?Q?uD+lJFV2uQF6sNHMOZ7cEozre2YJDrBiPjXPZJxRRwJkNyCZQ9wos5dGnbkM?= =?us-ascii?Q?bT/IuOBWHSTFi7udYKCJEroS46cPLOoUD1aTNQ3PLpWz7yAxFRtSOvegNyjf?= =?us-ascii?Q?qMXH4SI9pw/pUBsizZgWPZUvDBEQYTo22t3+mGl8Cx/7kJLmGCDR80PMX2v6?= =?us-ascii?Q?69/dLn70wmICYvlYWOiGPxYRSK/GwDsHPund5BhrB5muvd6MdVKRG+A8phzt?= =?us-ascii?Q?a+nnTD9HpNRl6D2DZXP0H5EdUkdD3wazuQqyGxF7gv5w+JwWxljbUEReOeV5?= =?us-ascii?Q?CNHewWxvWZJRVDvNqxI15IiGfALV+f3yQczDF52sWk1/lEeXXq2dw2Zc9h7N?= =?us-ascii?Q?l91ILc4V6F4RymcCSRiO/xjPzvObnKXTtdlWqmZlQmUl/kfh+BhvUwhRJ4/2?= =?us-ascii?Q?oktgrBsH5B3HnXAvwcItrz0oxDoSy4LBiauoSIxDm56V/degOzhZB3jW3UQK?= =?us-ascii?Q?xWS20onnR0VeAPP1RiV7To7J6oAuinDS5cpXBjbiv6SJlrDQAkaH/5rup4y8?= =?us-ascii?Q?ta+7oLmMdrzUPvWxOt56LbW/zfoj3cjx/FcZNeM8T/h9LeHFFrLD5rRT0Dpq?= =?us-ascii?Q?HfdWHhHKkCDHAuXJuxLmKOfd3BM0M+zlm+Eds70wJvtuFKYBgg2qypjHhdYm?= =?us-ascii?Q?EWKLiHHeW9bDatxPcAfTdRZ3Q6RfpSA6lDlb6TQi+UUPCLsnNtT93DkC0bQq?= =?us-ascii?Q?tD+TNglSRWkUlXUqWeJdkxeYGNbVX3a5xym/Wjezer44QV/g+jy/aHrO7al5?= =?us-ascii?Q?3oatt5QBMl64eC5xpfXwaosEPr1zZOOofCCl5nYt+FLBbHUuNTCo/91mBfVE?= =?us-ascii?Q?hbo4VOMIW9V9zMOeW8O+4r3hEszJHMbSKTn/BqR2n5AnhGkmyVioD6EaujW1?= =?us-ascii?Q?1/VOdL9SIl+00I5LOL+gMQ7adjbxphfGkREm50KZxi/Z/NAnrTy2xPrbFd9c?= =?us-ascii?Q?xgLzGLGMwdG8UW5QH5n0LKgq3g1qYD4Q13QpSQzc+jcideuokJgDLLuNfXlU?= =?us-ascii?Q?iOT167JiqJeMcsqtNYaLvdt8ORjdTjh2oq5VLYggAJNTOzwTUgzL0e5Af5r1?= =?us-ascii?Q?pEyDKKlzxDwQGm6nd+UGS0Ivm8yqSK3?= X-Microsoft-Exchange-Diagnostics: 1; MWHPR03MB2701; 6:MBwzZGn91MB5oZY11RQ7FbSViAUqQTYbQl+NYMia/oKhNchnJSrrAZKUzyaPZ4rWenwIXv8zygSqC5N2DKlQrkgSIjztsgvFyiMDNI+rmXMc165SfncMBxdk4OJh8rb8WxwXn8PtIIC4xsNq5WV+Wt/50FYpwJy8GyHugcLQCFVvJ8sb+EjgaFtR6RF19VRVixiDU+z/AYZ5sRkUTv/IqUBM/+bsVs0R1LsYuuY/kBnekJQjVLqlRGkpqfCIbozcyuWzzfPfE8CvZ8bp/v8T1i5tsxMtaYMbMRx5jBYJq4WLzkQo1E9REBLvKmC42Az3GPm7vFUfXxT1T5DYLUUlSF+JLwtM6Cr+WGIcCNZnZfA=; 5:n+ZPuPPedtVG1hbxANrHvbPUm3T5c8VA0SoVpKy9ErWgvGsat172sz6H42V26iaEgvmY6F/+lbkp4KjT0f7lhu8chHI88AtEBoudJxmBKv4DkXDghuZyFf9/pbjwaLTO22Ugl2A73eP/b3fZUHXdcT/CXYk9ewyzftvy+wYifTQ=; 24:eDC1gwt276b4XbJAgs2idnHHWcNQzTzZhLS3JzGf6DvGfAw/lupa2NmOJK4M3srpRMmm5osknwewGTD0ZaR3mrh60xALF7R4PeCIV9HLilI=; 7:XJs2q1P6d7LTSTywe9uYgsdIS1pK6ytc3mS+mO5p0oKEu9Yn2APJWUiBEgp0AHcJtMdVULiHKvatPu71M9q1TVeJxhpiOrt5+yp/L4/nfF51/eIHfJHzcTb9r/ldS4E2wzuvGlF9CNrNmRrfDQSv/srZeF/Jqakxoy+SchKWze+25iP04pA/QZFgAGTCCdunQefZhBZurQAv0GPty2F3Jp+DHw1o/w+BlFeVRO81atPKefS8PkNLlFz+zSZaK+ZQ SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Jan 2018 11:24:46.4660 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 28c8d08e-e32d-4d95-c797-08d5618abea4 X-MS-Exchange-CrossTenant-Id: 5afe0b00-7697-4969-b663-5eab37d5f47e X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e; Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR03MB2701 X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aisheng.dong@nxp.com, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds i.MX7 thermal sensor support, most of the i.MX7 thermal sensor functions are same with i.MX6 except the registers offset/layout, so we move those registers offset/layout definitions to soc data structure. i.MX7 uses single calibration data @25C, the calibration data is located at OCOTP offset 0x4F0, bit[17:9], the formula is as below: Tmeas = (Nmeas - n1) + 25; n1 is the fuse value for 25C. Signed-off-by: Anson Huang Signed-off-by: Bai Ping --- drivers/thermal/imx_thermal.c | 315 +++++++++++++++++++++++++++++++++--------- 1 file changed, 247 insertions(+), 68 deletions(-) diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c index e7d4ffc..b2a00d6 100644 --- a/drivers/thermal/imx_thermal.c +++ b/drivers/thermal/imx_thermal.c @@ -31,34 +31,58 @@ #define REG_CLR 0x8 #define REG_TOG 0xc -#define MISC0 0x0150 -#define MISC0_REFTOP_SELBIASOFF (1 << 3) -#define MISC1 0x0160 -#define MISC1_IRQ_TEMPHIGH (1 << 29) +/* i.MX6 specific */ +#define IMX6_MISC0 0x0150 +#define IMX6_MISC0_REFTOP_SELBIASOFF (1 << 3) +#define IMX6_MISC1 0x0160 +#define IMX6_MISC1_IRQ_TEMPHIGH (1 << 29) /* Below LOW and PANIC bits are only for TEMPMON_IMX6SX */ -#define MISC1_IRQ_TEMPLOW (1 << 28) -#define MISC1_IRQ_TEMPPANIC (1 << 27) - -#define TEMPSENSE0 0x0180 -#define TEMPSENSE0_ALARM_VALUE_SHIFT 20 -#define TEMPSENSE0_ALARM_VALUE_MASK (0xfff << TEMPSENSE0_ALARM_VALUE_SHIFT) -#define TEMPSENSE0_TEMP_CNT_SHIFT 8 -#define TEMPSENSE0_TEMP_CNT_MASK (0xfff << TEMPSENSE0_TEMP_CNT_SHIFT) -#define TEMPSENSE0_FINISHED (1 << 2) -#define TEMPSENSE0_MEASURE_TEMP (1 << 1) -#define TEMPSENSE0_POWER_DOWN (1 << 0) - -#define TEMPSENSE1 0x0190 -#define TEMPSENSE1_MEASURE_FREQ 0xffff -/* Below TEMPSENSE2 is only for TEMPMON_IMX6SX */ -#define TEMPSENSE2 0x0290 -#define TEMPSENSE2_LOW_VALUE_SHIFT 0 -#define TEMPSENSE2_LOW_VALUE_MASK 0xfff -#define TEMPSENSE2_PANIC_VALUE_SHIFT 16 -#define TEMPSENSE2_PANIC_VALUE_MASK 0xfff0000 +#define IMX6_MISC1_IRQ_TEMPLOW (1 << 28) +#define IMX6_MISC1_IRQ_TEMPPANIC (1 << 27) + +#define IMX6_TEMPSENSE0 0x0180 +#define IMX6_TEMPSENSE0_ALARM_VALUE_SHIFT 20 +#define IMX6_TEMPSENSE0_ALARM_VALUE_MASK (0xfff << 20) +#define IMX6_TEMPSENSE0_TEMP_CNT_SHIFT 8 +#define IMX6_TEMPSENSE0_TEMP_CNT_MASK (0xfff << 8) +#define IMX6_TEMPSENSE0_FINISHED (1 << 2) +#define IMX6_TEMPSENSE0_MEASURE_TEMP (1 << 1) +#define IMX6_TEMPSENSE0_POWER_DOWN (1 << 0) + +#define IMX6_TEMPSENSE1 0x0190 +#define IMX6_TEMPSENSE1_MEASURE_FREQ 0xffff +#define IMX6_TEMPSENSE1_MEASURE_FREQ_SHIFT 0 -#define OCOTP_MEM0 0x0480 -#define OCOTP_ANA1 0x04e0 +/* Below TEMPSENSE2 is only for TEMPMON_IMX6SX */ +#define IMX6_TEMPSENSE2 0x0290 +#define IMX6_TEMPSENSE2_LOW_VALUE_SHIFT 0 +#define IMX6_TEMPSENSE2_LOW_VALUE_MASK 0xfff +#define IMX6_TEMPSENSE2_PANIC_VALUE_SHIFT 16 +#define IMX6_TEMPSENSE2_PANIC_VALUE_MASK 0xfff0000 + +/* i.MX7 specific */ +#define IMX7_ANADIG_DIGPROG 0x800 +#define IMX7_TEMPSENSE0 0x300 +#define IMX7_TEMPSENSE0_PANIC_ALARM_SHIFT 18 +#define IMX7_TEMPSENSE0_PANIC_ALARM_MASK (0x1ff << 18) +#define IMX7_TEMPSENSE0_HIGH_ALARM_SHIFT 9 +#define IMX7_TEMPSENSE0_HIGH_ALARM_MASK (0x1ff << 9) +#define IMX7_TEMPSENSE0_LOW_ALARM_SHIFT 0 +#define IMX7_TEMPSENSE0_LOW_ALARM_MASK 0x1ff + +#define IMX7_TEMPSENSE1 0x310 +#define IMX7_TEMPSENSE1_MEASURE_FREQ_SHIFT 16 +#define IMX7_TEMPSENSE1_MEASURE_FREQ_MASK (0xffff << 16) +#define IMX7_TEMPSENSE1_FINISHED (1 << 11) +#define IMX7_TEMPSENSE1_MEASURE_TEMP (1 << 10) +#define IMX7_TEMPSENSE1_POWER_DOWN (1 << 9) +#define IMX7_TEMPSENSE1_TEMP_VALUE_SHIFT 0 +#define IMX7_TEMPSENSE1_TEMP_VALUE_MASK 0x1ff + +#define IMX6_OCOTP_MEM0 0x0480 +#define IMX6_OCOTP_ANA1 0x04e0 +#define IMX7_OCOTP_TESTER3 0x0440 +#define IMX7_OCOTP_ANA1 0x04f0 /* The driver supports 1 passive trip point and 1 critical trip point */ enum imx_thermal_trip { @@ -76,17 +100,110 @@ enum imx_thermal_trip { #define TEMPMON_IMX6Q 1 #define TEMPMON_IMX6SX 2 +#define TEMPMON_IMX7 3 struct thermal_soc_data { u32 version; + + u32 sensor_ctrl; + u32 power_down_mask; + u32 measure_temp_mask; + + u32 measure_freq_ctrl; + u32 measure_freq_mask; + u32 measure_freq_shift; + + u32 temp_data; + u32 temp_value_mask; + u32 temp_value_shift; + u32 temp_valid_mask; + + u32 panic_alarm_ctrl; + u32 panic_alarm_mask; + u32 panic_alarm_shift; + + u32 high_alarm_ctrl; + u32 high_alarm_mask; + u32 high_alarm_shift; + + u32 low_alarm_ctrl; + u32 low_alarm_mask; + u32 low_alarm_shift; }; static struct thermal_soc_data thermal_imx6q_data = { .version = TEMPMON_IMX6Q, + + .sensor_ctrl = IMX6_TEMPSENSE0, + .power_down_mask = IMX6_TEMPSENSE0_POWER_DOWN, + .measure_temp_mask = IMX6_TEMPSENSE0_MEASURE_TEMP, + + .measure_freq_ctrl = IMX6_TEMPSENSE1, + .measure_freq_shift = IMX6_TEMPSENSE1_MEASURE_FREQ_SHIFT, + .measure_freq_mask = IMX6_TEMPSENSE1_MEASURE_FREQ, + + .temp_data = IMX6_TEMPSENSE0, + .temp_value_mask = IMX6_TEMPSENSE0_TEMP_CNT_MASK, + .temp_value_shift = IMX6_TEMPSENSE0_TEMP_CNT_SHIFT, + .temp_valid_mask = IMX6_TEMPSENSE0_FINISHED, + + .high_alarm_ctrl = IMX6_TEMPSENSE0, + .high_alarm_mask = IMX6_TEMPSENSE0_ALARM_VALUE_MASK, + .high_alarm_shift = IMX6_TEMPSENSE0_ALARM_VALUE_SHIFT, }; static struct thermal_soc_data thermal_imx6sx_data = { .version = TEMPMON_IMX6SX, + + .sensor_ctrl = IMX6_TEMPSENSE0, + .power_down_mask = IMX6_TEMPSENSE0_POWER_DOWN, + .measure_temp_mask = IMX6_TEMPSENSE0_MEASURE_TEMP, + + .measure_freq_ctrl = IMX6_TEMPSENSE1, + .measure_freq_shift = IMX6_TEMPSENSE1_MEASURE_FREQ_SHIFT, + .measure_freq_mask = IMX6_TEMPSENSE1_MEASURE_FREQ, + + .temp_data = IMX6_TEMPSENSE0, + .temp_value_mask = IMX6_TEMPSENSE0_TEMP_CNT_MASK, + .temp_value_shift = IMX6_TEMPSENSE0_TEMP_CNT_SHIFT, + .temp_valid_mask = IMX6_TEMPSENSE0_FINISHED, + + .high_alarm_ctrl = IMX6_TEMPSENSE0, + .high_alarm_mask = IMX6_TEMPSENSE0_ALARM_VALUE_MASK, + .high_alarm_shift = IMX6_TEMPSENSE0_ALARM_VALUE_SHIFT, + + .panic_alarm_ctrl = IMX6_TEMPSENSE2, + .panic_alarm_mask = IMX6_TEMPSENSE2_PANIC_VALUE_MASK, + .panic_alarm_shift = IMX6_TEMPSENSE2_PANIC_VALUE_SHIFT, +}; + +static struct thermal_soc_data thermal_imx7_data = { + .version = TEMPMON_IMX7, + + .sensor_ctrl = IMX7_TEMPSENSE1, + .power_down_mask = IMX7_TEMPSENSE1_POWER_DOWN, + .measure_temp_mask = IMX7_TEMPSENSE1_MEASURE_TEMP, + + .measure_freq_ctrl = IMX7_TEMPSENSE1, + .measure_freq_shift = IMX7_TEMPSENSE1_MEASURE_FREQ_SHIFT, + .measure_freq_mask = IMX7_TEMPSENSE1_MEASURE_FREQ_MASK, + + .temp_data = IMX7_TEMPSENSE1, + .temp_value_mask = IMX7_TEMPSENSE1_TEMP_VALUE_MASK, + .temp_value_shift = IMX7_TEMPSENSE1_TEMP_VALUE_SHIFT, + .temp_valid_mask = IMX7_TEMPSENSE1_FINISHED, + + .panic_alarm_ctrl = IMX7_TEMPSENSE1, + .panic_alarm_mask = IMX7_TEMPSENSE0_PANIC_ALARM_MASK, + .panic_alarm_shift = IMX7_TEMPSENSE0_PANIC_ALARM_SHIFT, + + .high_alarm_ctrl = IMX7_TEMPSENSE0, + .high_alarm_mask = IMX7_TEMPSENSE0_HIGH_ALARM_MASK, + .high_alarm_shift = IMX7_TEMPSENSE0_HIGH_ALARM_SHIFT, + + .low_alarm_ctrl = IMX7_TEMPSENSE0, + .low_alarm_mask = IMX7_TEMPSENSE0_LOW_ALARM_MASK, + .low_alarm_shift = IMX7_TEMPSENSE0_LOW_ALARM_SHIFT, }; struct imx_thermal_data { @@ -112,30 +229,44 @@ static void imx_set_panic_temp(struct imx_thermal_data *data, int panic_temp) { struct regmap *map = data->tempmon; + const struct thermal_soc_data *soc_data = data->socdata; int critical_value; - critical_value = (data->c2 - panic_temp) / data->c1; - regmap_write(map, TEMPSENSE2 + REG_CLR, TEMPSENSE2_PANIC_VALUE_MASK); - regmap_write(map, TEMPSENSE2 + REG_SET, critical_value << - TEMPSENSE2_PANIC_VALUE_SHIFT); + if (data->socdata->version == TEMPMON_IMX7) + critical_value = panic_temp / 1000 + data->c1 - 25; + else + critical_value = (data->c2 - panic_temp) / data->c1; + + regmap_write(map, soc_data->panic_alarm_ctrl + REG_CLR, + soc_data->panic_alarm_mask); + regmap_write(map, soc_data->panic_alarm_ctrl + REG_SET, + critical_value << soc_data->panic_alarm_shift); } static void imx_set_alarm_temp(struct imx_thermal_data *data, int alarm_temp) { struct regmap *map = data->tempmon; + const struct thermal_soc_data *soc_data = data->socdata; int alarm_value; data->alarm_temp = alarm_temp; - alarm_value = (data->c2 - alarm_temp) / data->c1; - regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_ALARM_VALUE_MASK); - regmap_write(map, TEMPSENSE0 + REG_SET, alarm_value << - TEMPSENSE0_ALARM_VALUE_SHIFT); + + if (data->socdata->version == TEMPMON_IMX7) + alarm_value = alarm_temp / 1000 + data->c1 - 25; + else + alarm_value = (data->c2 - alarm_temp) / data->c1; + + regmap_write(map, soc_data->high_alarm_ctrl + REG_CLR, + soc_data->high_alarm_mask); + regmap_write(map, soc_data->high_alarm_ctrl + REG_SET, + alarm_value << soc_data->high_alarm_shift); } static int imx_get_temp(struct thermal_zone_device *tz, int *temp) { struct imx_thermal_data *data = tz->devdata; + const struct thermal_soc_data *soc_data = data->socdata; struct regmap *map = data->tempmon; unsigned int n_meas; bool wait; @@ -143,16 +274,18 @@ static int imx_get_temp(struct thermal_zone_device *tz, int *temp) if (data->mode == THERMAL_DEVICE_ENABLED) { /* Check if a measurement is currently in progress */ - regmap_read(map, TEMPSENSE0, &val); - wait = !(val & TEMPSENSE0_FINISHED); + regmap_read(map, soc_data->temp_data, &val); + wait = !(val & soc_data->temp_valid_mask); } else { /* * Every time we measure the temperature, we will power on the * temperature sensor, enable measurements, take a reading, * disable measurements, power off the temperature sensor. */ - regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_POWER_DOWN); - regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_MEASURE_TEMP); + regmap_write(map, soc_data->sensor_ctrl + REG_CLR, + soc_data->power_down_mask); + regmap_write(map, soc_data->sensor_ctrl + REG_SET, + soc_data->measure_temp_mask); wait = true; } @@ -164,22 +297,28 @@ static int imx_get_temp(struct thermal_zone_device *tz, int *temp) if (wait) usleep_range(20, 50); - regmap_read(map, TEMPSENSE0, &val); + regmap_read(map, soc_data->temp_data, &val); if (data->mode != THERMAL_DEVICE_ENABLED) { - regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_MEASURE_TEMP); - regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_POWER_DOWN); + regmap_write(map, soc_data->sensor_ctrl + REG_CLR, + soc_data->measure_temp_mask); + regmap_write(map, soc_data->sensor_ctrl + REG_SET, + soc_data->power_down_mask); } - if ((val & TEMPSENSE0_FINISHED) == 0) { + if ((val & soc_data->temp_valid_mask) == 0) { dev_dbg(&tz->device, "temp measurement never finished\n"); return -EAGAIN; } - n_meas = (val & TEMPSENSE0_TEMP_CNT_MASK) >> TEMPSENSE0_TEMP_CNT_SHIFT; + n_meas = (val & soc_data->temp_value_mask) + >> soc_data->temp_value_shift; /* See imx_init_calib() for formula derivation */ - *temp = data->c2 - n_meas * data->c1; + if (data->socdata->version == TEMPMON_IMX7) + *temp = (n_meas - data->c1 + 25) * 1000; + else + *temp = data->c2 - n_meas * data->c1; /* Update alarm value to next higher trip point for TEMPMON_IMX6Q */ if (data->socdata->version == TEMPMON_IMX6Q) { @@ -223,21 +362,26 @@ static int imx_set_mode(struct thermal_zone_device *tz, { struct imx_thermal_data *data = tz->devdata; struct regmap *map = data->tempmon; + const struct thermal_soc_data *soc_data = data->socdata; if (mode == THERMAL_DEVICE_ENABLED) { tz->polling_delay = IMX_POLLING_DELAY; tz->passive_delay = IMX_PASSIVE_DELAY; - regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_POWER_DOWN); - regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_MEASURE_TEMP); + regmap_write(map, soc_data->sensor_ctrl + REG_CLR, + soc_data->power_down_mask); + regmap_write(map, soc_data->sensor_ctrl + REG_SET, + soc_data->measure_temp_mask); if (!data->irq_enabled) { data->irq_enabled = true; enable_irq(data->irq); } } else { - regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_MEASURE_TEMP); - regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_POWER_DOWN); + regmap_write(map, soc_data->sensor_ctrl + REG_CLR, + soc_data->measure_temp_mask); + regmap_write(map, soc_data->sensor_ctrl + REG_SET, + soc_data->power_down_mask); tz->polling_delay = 0; tz->passive_delay = 0; @@ -359,6 +503,15 @@ static int imx_init_calib(struct platform_device *pdev, u32 val) } /* + * On i.MX7, we only use the calibration data at 25C to get the temp, + * Tmeas = ( Nmeas - n1) + 25; n1 is the fuse value for 25C. + */ + if (data->socdata->version == TEMPMON_IMX7) { + data->c1 = (val >> 9) & 0x1ff; + return 0; + } + + /* * Sensor data layout: * [31:20] - sensor value @ 25C * Use universal formula now and only need sensor value @ 25C @@ -426,6 +579,7 @@ static void imx_init_temp_grade(struct platform_device *pdev, u32 val) static int imx_init_from_tempmon_data(struct platform_device *pdev) { + struct imx_thermal_data *data = platform_get_drvdata(pdev); struct regmap *map; int ret; u32 val; @@ -438,7 +592,11 @@ static int imx_init_from_tempmon_data(struct platform_device *pdev) return ret; } - ret = regmap_read(map, OCOTP_ANA1, &val); + if (data->socdata->version == TEMPMON_IMX7) + ret = regmap_read(map, IMX7_OCOTP_ANA1, &val); + else + ret = regmap_read(map, IMX6_OCOTP_ANA1, &val); + if (ret) { dev_err(&pdev->dev, "failed to read sensor data: %d\n", ret); return ret; @@ -447,7 +605,11 @@ static int imx_init_from_tempmon_data(struct platform_device *pdev) if (ret) return ret; - ret = regmap_read(map, OCOTP_MEM0, &val); + /* use OTP for thermal grade */ + if (data->socdata->version == TEMPMON_IMX7) + ret = regmap_read(map, IMX7_OCOTP_TESTER3, &val); + else + ret = regmap_read(map, IMX6_OCOTP_MEM0, &val); if (ret) { dev_err(&pdev->dev, "failed to read sensor data: %d\n", ret); return ret; @@ -500,6 +662,7 @@ static irqreturn_t imx_thermal_alarm_irq_thread(int irq, void *dev) static const struct of_device_id of_imx_thermal_match[] = { { .compatible = "fsl,imx6q-tempmon", .data = &thermal_imx6q_data, }, { .compatible = "fsl,imx6sx-tempmon", .data = &thermal_imx6sx_data, }, + { .compatible = "fsl,imx7-tempmon", .data = &thermal_imx7_data, }, { /* end */ } }; MODULE_DEVICE_TABLE(of, of_imx_thermal_match); @@ -531,14 +694,15 @@ static int imx_thermal_probe(struct platform_device *pdev) /* make sure the IRQ flag is clear before enabling irq on i.MX6SX */ if (data->socdata->version == TEMPMON_IMX6SX) { - regmap_write(map, MISC1 + REG_CLR, MISC1_IRQ_TEMPHIGH | - MISC1_IRQ_TEMPLOW | MISC1_IRQ_TEMPPANIC); + regmap_write(map, IMX6_MISC1 + REG_CLR, + IMX6_MISC1_IRQ_TEMPHIGH | IMX6_MISC1_IRQ_TEMPLOW + | IMX6_MISC1_IRQ_TEMPPANIC); /* * reset value of LOW ALARM is incorrect, set it to lowest * value to avoid false trigger of low alarm. */ - regmap_write(map, TEMPSENSE2 + REG_SET, - TEMPSENSE2_LOW_VALUE_MASK); + regmap_write(map, IMX6_TEMPSENSE2 + REG_SET, + IMX6_TEMPSENSE2_LOW_VALUE_MASK); } data->irq = platform_get_irq(pdev, 0); @@ -565,11 +729,17 @@ static int imx_thermal_probe(struct platform_device *pdev) } /* Make sure sensor is in known good state for measurements */ - regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_POWER_DOWN); - regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_MEASURE_TEMP); - regmap_write(map, TEMPSENSE1 + REG_CLR, TEMPSENSE1_MEASURE_FREQ); - regmap_write(map, MISC0 + REG_SET, MISC0_REFTOP_SELBIASOFF); - regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_POWER_DOWN); + regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, + data->socdata->power_down_mask); + regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, + data->socdata->measure_temp_mask); + regmap_write(map, data->socdata->measure_freq_ctrl + REG_CLR, + data->socdata->measure_freq_mask); + if (data->socdata->version != TEMPMON_IMX7) + regmap_write(map, IMX6_MISC0 + REG_SET, + IMX6_MISC0_REFTOP_SELBIASOFF); + regmap_write(map, data->socdata->sensor_ctrl + REG_SET, + data->socdata->power_down_mask); data->policy = cpufreq_cpu_get(0); if (!data->policy) { @@ -634,16 +804,20 @@ static int imx_thermal_probe(struct platform_device *pdev) data->temp_passive / 1000); /* Enable measurements at ~ 10 Hz */ - regmap_write(map, TEMPSENSE1 + REG_CLR, TEMPSENSE1_MEASURE_FREQ); + regmap_write(map, data->socdata->measure_freq_ctrl + REG_CLR, + data->socdata->measure_freq_mask); measure_freq = DIV_ROUND_UP(32768, 10); /* 10 Hz */ - regmap_write(map, TEMPSENSE1 + REG_SET, measure_freq); + regmap_write(map, data->socdata->measure_freq_ctrl + REG_SET, + measure_freq << data->socdata->measure_freq_shift); imx_set_alarm_temp(data, data->temp_passive); if (data->socdata->version == TEMPMON_IMX6SX) imx_set_panic_temp(data, data->temp_critical); - regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_POWER_DOWN); - regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_MEASURE_TEMP); + regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, + data->socdata->power_down_mask); + regmap_write(map, data->socdata->sensor_ctrl + REG_SET, + data->socdata->measure_temp_mask); ret = devm_request_threaded_irq(&pdev->dev, data->irq, imx_thermal_alarm_irq, imx_thermal_alarm_irq_thread, @@ -669,7 +843,8 @@ static int imx_thermal_remove(struct platform_device *pdev) struct regmap *map = data->tempmon; /* Disable measurements */ - regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_POWER_DOWN); + regmap_write(map, data->socdata->sensor_ctrl + REG_SET, + data->socdata->power_down_mask); if (!IS_ERR(data->thermal_clk)) clk_disable_unprepare(data->thermal_clk); @@ -692,8 +867,10 @@ static int imx_thermal_suspend(struct device *dev) * temperature will be read as the thermal sensor is powered * down. */ - regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_MEASURE_TEMP); - regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_POWER_DOWN); + regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, + data->socdata->measure_temp_mask); + regmap_write(map, data->socdata->sensor_ctrl + REG_SET, + data->socdata->power_down_mask); data->mode = THERMAL_DEVICE_DISABLED; clk_disable_unprepare(data->thermal_clk); @@ -710,8 +887,10 @@ static int imx_thermal_resume(struct device *dev) if (ret) return ret; /* Enabled thermal sensor after resume */ - regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_POWER_DOWN); - regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_MEASURE_TEMP); + regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, + data->socdata->power_down_mask); + regmap_write(map, data->socdata->sensor_ctrl + REG_SET, + data->socdata->measure_temp_mask); data->mode = THERMAL_DEVICE_ENABLED; return 0;