diff mbox

i2c: bcm2835: Avoid clock stretching timeouts

Message ID 1519422151-6218-1-git-send-email-stefan.wahren@i2se.com (mailing list archive)
State New, archived
Headers show

Commit Message

Stefan Wahren Feb. 23, 2018, 9:42 p.m. UTC
From: Eric Anholt <eric@anholt.net>

The CLKT register contains at poweron 0x40, which at our typical 100kHz
bus rate means .64ms. But there is no specified limit to how long devices
should be able to stretch the clocks, so just disable the timeout. We
still have a timeout wrapping the entire transfer.

Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
Hi,
just like "i2c: bcm2835: Set up the rising/falling edge delays" this is a
outstanding bugfix. Unfortunately i only have I2C slaves, which doesn't
stretch the clock. So test feedback is very welcome.


 drivers/i2c/busses/i2c-bcm2835.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

Comments

Eric Anholt Feb. 26, 2018, 11:33 p.m. UTC | #1
Stefan Wahren <stefan.wahren@i2se.com> writes:

> From: Eric Anholt <eric@anholt.net>
>
> The CLKT register contains at poweron 0x40, which at our typical 100kHz
> bus rate means .64ms. But there is no specified limit to how long devices
> should be able to stretch the clocks, so just disable the timeout. We
> still have a timeout wrapping the entire transfer.
>
> Signed-off-by: Eric Anholt <eric@anholt.net>
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
> ---
> Hi,
> just like "i2c: bcm2835: Set up the rising/falling edge delays" this is a
> outstanding bugfix. Unfortunately i only have I2C slaves, which doesn't
> stretch the clock. So test feedback is very welcome.

I also didn't have any particular devices that this fixed.  It was just
an issue that came up in a previous discussion of clock stretching.
Wolfram Sang Feb. 7, 2022, 3:08 p.m. UTC | #2
On Fri, Feb 23, 2018 at 10:42:31PM +0100, Stefan Wahren wrote:
> From: Eric Anholt <eric@anholt.net>
> 
> The CLKT register contains at poweron 0x40, which at our typical 100kHz
> bus rate means .64ms. But there is no specified limit to how long devices
> should be able to stretch the clocks, so just disable the timeout. We
> still have a timeout wrapping the entire transfer.
> 
> Signed-off-by: Eric Anholt <eric@anholt.net>
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>

Okay, it has been years but the issue came up again [1] so finally
applied to for-current with stable added, thanks!

[1] http://patchwork.ozlabs.org/project/linux-i2c/patch/20220117102504.90585-1-iivanov@suse.de/
diff mbox

Patch

diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
index 44deae7..ccd2565 100644
--- a/drivers/i2c/busses/i2c-bcm2835.c
+++ b/drivers/i2c/busses/i2c-bcm2835.c
@@ -28,6 +28,11 @@ 
 #define BCM2835_I2C_FIFO	0x10
 #define BCM2835_I2C_DIV		0x14
 #define BCM2835_I2C_DEL		0x18
+/*
+ * 16-bit field for the number of SCL cycles to wait after rising SCL
+ * before deciding the slave is not responding.  0 disables the
+ * timeout detection.
+ */
 #define BCM2835_I2C_CLKT	0x1c
 
 #define BCM2835_I2C_C_READ	BIT(0)
@@ -386,6 +391,12 @@  static int bcm2835_i2c_probe(struct platform_device *pdev)
 	adap->dev.of_node = pdev->dev.of_node;
 	adap->quirks = &bcm2835_i2c_quirks;
 
+	/*
+	 * Disable the hardware clock stretching timeout.  SMBUS
+	 * specifies a limit for how long the device can stretch the
+	 * clock, but core I2C doesn't.
+	 */
+	bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_CLKT, 0);
 	bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, 0);
 
 	ret = i2c_add_adapter(adap);