From patchwork Mon Mar 12 09:36:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacky Bai X-Patchwork-Id: 10275757 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4CD02602C2 for ; Mon, 12 Mar 2018 09:35:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4C07528B70 for ; Mon, 12 Mar 2018 09:35:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3C39728CAC; Mon, 12 Mar 2018 09:35:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAD_ENC_HEADER,BAYES_00, DKIM_SIGNED,DKIM_VALID,UPPERCASE_50_75 autolearn=no version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5033428B70 for ; Mon, 12 Mar 2018 09:35:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=YTD6dQSAys4MI0uvyH8ULcgjXlDmvRYNJ0raSligcmI=; b=TgPAIJlUXB6apv XJxHgRa6KDrHM54tGedVkJIkfSa7kosP3RH8bI5c+fIq9CaLHVr2lI+nh6c1KRSUmIOIJESlFnWO3 uKAa++AqE4eAAyb9dt+zOo0+ZOmC219y9pSDLzOvhNHt9ehcG+HKuA9DMA7ohNd3bI/L5BVs2nEN4 psGUMZSaOR6V8vEQILMwY6CAMoV1E4Xagbo60laf5Tgr5W85d4ROuLOwD9NQ/+ZOAbb19juyt+UeG bcREz+87CSgnqFSZHlSccRJ7/hszWUiVjcMcmyNZW8wCbmWhUJ3P9V6AWlffCRBMWVeqIc+6UDMil 9SrwXpumPKmbcCHpseHw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.89 #1 (Red Hat Linux)) id 1evJrH-0005XP-Fg; Mon, 12 Mar 2018 09:35:07 +0000 Received: from mail-he1eur01on0057.outbound.protection.outlook.com ([104.47.0.57] helo=EUR01-HE1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.89 #1 (Red Hat Linux)) id 1evJqk-00055U-NR for linux-arm-kernel@lists.infradead.org; Mon, 12 Mar 2018 09:34:36 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=uXC6xwNWxzbt3fLFwQEFWUQo7lF+r9/rH7qMyrrLWvA=; b=VzPNv/K/sMK6RYW8nxIMtnJqZkKJl9a3WH+PmegMPubsD0csZLZSjauDpDQa4Go7ktZ55K85m59JrtO0n0O9Cb+AlTKBG0mE4oOfG5iiUDCsxtacv1A/ejcXk3c85CDznhiPpb4e+yDUBoclMUBOcYyjwLNU/WCPPJtTKIob75I= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=ping.bai@nxp.com; Received: from localhost.localdomain (92.121.68.129) by HE1PR04MB3113.eurprd04.prod.outlook.com (2603:10a6:7:20::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.548.13; Mon, 12 Mar 2018 09:34:20 +0000 From: Bai Ping To: linus.walleij@linaro.org, robh+dt@kernel.org, shawnguo@kernel.org, kernel@pengutronix.de Subject: [PATCH v5 2/2] pinctrl: imx: Add pinctrl driver support for imx6sll Date: Mon, 12 Mar 2018 17:36:56 +0800 Message-Id: <1520847416-22732-2-git-send-email-ping.bai@nxp.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1520847416-22732-1-git-send-email-ping.bai@nxp.com> References: <1520847416-22732-1-git-send-email-ping.bai@nxp.com> MIME-Version: 1.0 X-Originating-IP: [92.121.68.129] X-ClientProxiedBy: HK2PR02CA0175.apcprd02.prod.outlook.com (2603:1096:201:21::11) To HE1PR04MB3113.eurprd04.prod.outlook.com (2603:10a6:7:20::31) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 255bfe14-4770-424c-0851-08d587fc713e X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(7020095)(4652020)(5600026)(4604075)(4534165)(4627221)(201703031133081)(201702281549075)(48565401081)(2017052603328)(7153060)(7193020); SRVR:HE1PR04MB3113; X-Microsoft-Exchange-Diagnostics: 1; HE1PR04MB3113; 3:VCmXzfabAYY2gcDqZA9MyUlbaW6xQGOTj+vuxFwpqz3aBCnx+qufqxOuM/dxXLNbhMkvPwr+34e7Yv5nSTxDZ2a/MwWrWIVVO8QoGMAdhZGhP6jdy8mgiEe9FrZzBF+m7EPfmlxl9b0g7tBcAQtX+9RiQ29nWMWyfuOFu/RnLFgQi/CFyJTzx0TBV83AOyQuXtxosvAz5O6nJKRSEij4lDQVuPYhbHvm0OMxeKrFf8ZWIde15SmEiND6nAFMx+rv; 25:LQTWvxaxxXte6+8Ebkw1rhhcvAL1eW0NszLEMOBVLYSex1XXAQLjkrKpsBkuF9LYkHudjQ8uNyABvvnc7elKdlSqjQSbjj22y4tqS3+vQPvrS5Z9wRwpS/7EL9OBtS3dBsaFynUQaP0bID819fTekekpQfSFZnQKb0cB5DfQMBG7mpn6T1uR9Se5EzTOr9UMWACv5fp+HO3OX45daGmvnQ1Xk6JT4EO9dM2sMWtgONyI8PZr/hE2kGXTioj3Sq/mdBBeNFksClXMWiVcK49qw4Z2+QkkwOQ7oze+3yYWtgsIuOwCEr784r5xLpn1yM5QL6bhxOaeHI/oThPib3T92Q==; 31:OjjpY7QUrjDtVhav7Idt4Ee4qwIYvVjfhymfQjPoO5kckPoBsQrK7Wb3asNQIlT8AkPtI5fKHeEVlyCNxcA8DxbcLfe4zOaMY0YzwV/3HLEteSn4L2dN/tdUiK17UDTxTlamm3iYPva454HiGVPHwbmYvcUjBY+m9YZ9Ei5SWnvOkeT/B6Cni/qNhf5AzcD2Uf9rnEgPJ7Zzal3RHMJPQmND6MF2FETH7lA4JjT6a68= X-MS-TrafficTypeDiagnostic: HE1PR04MB3113: X-Microsoft-Exchange-Diagnostics: 1; HE1PR04MB3113; 20:U9yFxqaf3JEybJwXmY+VMvAdRdOtCguatEViir8sktkV+SRCwWCejpeUrscheiqNMEf/IHzTDfbAWj3CZKp74hNEWSgHVBwdVLIfjoqEQxvf3xxwaDx1gb9ppoJGhqcqxAHQq9FRXyV/LTDcsj9+fBCl2Lh787JB1ow3L16BgTGbkxZYHqWo3or21+MKqQg8VMVc6wLieQKBZTSnLn2oSKVx3kfsC6w/5Ktpj2G47j9tv3zDj6vNhZumGznmkw3SDwNmXaRsV4tohBuSwgl4gq0VfQZhYMIWmgN8DIltFCKKBMZKBi5eWWSlsnHYq1ywnL/xpcguQlKACdmjWtKWP+urCT3mJSi7aLMtAdu2Cei5GRUTYnOiw6LC7rrEkdK2W1K549X/KxjdWk6xGlOY9DCJNMwb1YUWAcFcDUAv9FE5iKU59wza+4HVWCUr7r0EG427TAMdgTa8Jy8MwD91qViyW8H6HIr1lVvQ/btjh7ccfLtoh4AzHRB9tO8SeTgT; 4:gXrJQp4aTqhJ+6nREgAzubsSZM18v2gUO+/mz9F4V+ASjFMhb4Lly40VQCltYlpPiOxRfStGKdimqUJBeuWTxItQj7r2sQQ4UOzSavLxXNI2RDddQwjNzrcP4ao0ONFFo7zqWiYynwD5vVZnJ9R0sItzTQAiO2XXuRgUGGDc6Mhid5Us3F9+lVZ7H1ATcDkMbtZI0BYpZF9mv3uVJ+OH7e9bR31JaU9Gh64p6aUDzpsxqYQIua6PR+8Xro7lAOnM7M2VrRXgPGGPx55u8CqkX3X62VAU6XHBS52r05w2hPVjTDyQ6RCwd6Gjn9ZjICrL X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(185117386973197); X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3002001)(93006095)(93001095)(10201501046)(3231220)(944501244)(52105095)(6055026)(6041310)(20161123564045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123562045)(20161123560045)(20161123558120)(6072148)(201708071742011); SRVR:HE1PR04MB3113; BCL:0; PCL:0; RULEID:; SRVR:HE1PR04MB3113; X-Forefront-PRVS: 06098A2863 X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10009020)(6069001)(39860400002)(396003)(39380400002)(366004)(376002)(346002)(199004)(189003)(86362001)(2950100002)(386003)(6666003)(4326008)(26005)(2906002)(16526019)(186003)(25786009)(106356001)(97736004)(316002)(39060400002)(16586007)(6506007)(76176011)(52116002)(51416003)(36756003)(53936002)(47776003)(66066001)(68736007)(6512007)(105586002)(50466002)(48376002)(3846002)(7736002)(50226002)(6486002)(81156014)(8676002)(81166006)(8936002)(5660300001)(478600001)(6116002)(305945005)(59450400001)(32563001); DIR:OUT; SFP:1101; SCL:1; SRVR:HE1PR04MB3113; H:localhost.localdomain; FPR:; SPF:None; PTR:InfoNoRecords; A:1; MX:1; LANG:en; Received-SPF: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; HE1PR04MB3113; 23:aG9Y7hFLFKo6tbdpE/WJADWvxfG/+rBGZAgFADh9r?= =?us-ascii?Q?leRq1+Ek/sF7e9S2Q1a2n6CPGAE7NAE5aNb9Bwtx990EcHu/Q/0yw668tDtJ?= =?us-ascii?Q?G+lEiO1aCRbqC908SYO6/DbOy+ENBpLU5wjnDSdKhk7Uu0oh4OAEQME5NJBQ?= =?us-ascii?Q?2zGgHaiMaI7PbiC2hMujJd4HvPYWzxEgNQPmOpYpV5vdlClPue7Tpk/kyUVN?= =?us-ascii?Q?aUUwOdLGUKcRfMb/ae2Msxb+sBVvKjkjbqK7aFckmf7BBlh4lWnR0zijZ/xe?= =?us-ascii?Q?Awf8whuEqWvAhMlpBIKwtVQy4VSAyDnhU/LV/IsVWJYI8e6c+hnlhD9gWiJn?= =?us-ascii?Q?3tUYVlHH1IuBeMM/F/f0061ibzbeU4kzEUwEyZ1+ZdojYFquofOfISV9BePp?= =?us-ascii?Q?sGR4K8ZNOrdlPjTijwy48Xexof3XHSNafcBys6bbRIoqrwQtE3f625WfrSy8?= =?us-ascii?Q?YYQB4wIojBxmmltUm6bI/0F3Sc+rdmKRfZ+ekyKytCum3IOygqwkAdFXvx86?= =?us-ascii?Q?e3u7WFu5f+4lyS99gbozZHtbLMb7HXH7Es8RPF/VIWrTmzrPygwj9OcBeMnH?= =?us-ascii?Q?Jclj4JvXrNTrhjm3zDheiAoYVPpMWAfbq/WvYjS7amQj9HuXxzs57wQ8BWSe?= =?us-ascii?Q?k/+1VTbfrpEtMm5d3Dw7Uy2j6WYb+Q/mdSBUDmAHoeEFeygMsLbt8ABJ5gZU?= =?us-ascii?Q?Iq9/IBurzrOa61B0PrcwZL8sFtNgCsbeRmfLY9DXi9mosrVn74ktbjBjUElc?= =?us-ascii?Q?EpOablDA7JKZpqZRk2Kx/HULYS6lKeZvI59rmSD1gk+JmJHX9vkxnb5gVciq?= =?us-ascii?Q?PELelKvrldCCd8BB6y8rbVW778WAtuXx17yrHtv5ENHst8QR4rySzwjl2hPW?= =?us-ascii?Q?Rn1stMcMAgNjx0VvftMLZmLbnFFTvjcMKDvuT3B4xQALdizFwg6Uu/QWQKlW?= =?us-ascii?Q?xkrKx5gLDtfTM7vcD1aoHjMMzESSlj1I7BlXHv3AlCkQSTW1yaXjOqzh5fbm?= =?us-ascii?Q?qoxiQCuiu2zQmVKv0an7twJLo3JIys/uTRqVYwVgUpb8waRVGljn7Eo3od3r?= =?us-ascii?Q?Wm0NgnjdgG5oVo3l5L2KTQyuI4qnRPyGwJIvpWhCcWHoMFaMVsW6dW1c3nQj?= =?us-ascii?Q?n/cCsvFSwRxao1XlHu/7yiTTJ2Sh9KayZsRRZBHDRRZ5JGDTKrWtOKw3+zC1?= =?us-ascii?Q?s2hUEM85FhsaQY=3D?= X-Microsoft-Antispam-Message-Info: ydcGr4WjEpnM3411dCEJStCXZeXcJYvNWqpYRHV0Kfy+9CUWcDFwDEMiFg9U2Z8+IoFMRwPDByjZwdYK7+kJDKUtIshcAiESzVOftJbs+HNIZE8R0LMQ78TTBA0Ala8lb/AnRXqt8w4Y+T1+7qvl6FGuIJGCFxSVAmCCuLNYLE+JTgKL4tnaQXiuvjsxvSdu X-Microsoft-Exchange-Diagnostics: 1; HE1PR04MB3113; 6:AuCeGCLO49mcMFXIU9gkHtNw882S+F1yb7GYhutvkoiMHpNC6MoLwCURich8XaJpjxnRPaZRZnnEj9stu/WBXWku2cY2Y0e3Dle6FLupOOyy3sAs5PrHhl0hK+Z8P9EYf5HD2Y9dn30wjOOHlBJNRlGC4kcgqQA39QoVoUp++ADBvoiPRF/erSQleKJakYCfPuv/wIAJMzaaPnVuZP0QX+qx+BLKW7mbgZudpY3rHDWyU0Xg8bo4F72Gt6QgKMg+bKUG2tMPPXdlxYxH7Wd8+sF6owvy0A60TZqSxAiDPH3s5zcLrxRM9V+hwQbtsqN8uqy4PpBuCZzUP6yBPhTDhI89t+HmxHjE8DC+s/7b0Wg=; 5:iY28ZNoCQlh0bXtYukIQ28a4NK3t9NgjKGHnMwnjh0JF0ppiO0gNDd4ZEFlfsG6z+ySqRFMzkBVWgs1TbxGakMZ/erE0hjbYGfysv/X43UUbIvm3EBdOkYBxVtZlHZUi2a1ZU7EP8mOaIyhGZDkJgINUW/5l/lcvQUSYEufXCg8=; 24:2RjgcTnA7qGzXpqv2lHw2erPhBVZMIE0iIQbkhy4X997URLTnNRh/BZurFiKzLy2thDg+mYLXTtMWvzGGB8cdy6DXjGLFsvrBd/F6H4kDDo=; 7:oT9+U7PivDrll6GFu6eGBb9j6rpvc2lP7CcIrzyT5wM5gQO1TddyHjnaWDbyjdCIS0L97AnZeQU9lkhYOHeTIZKkC3y+psuE0nbRX6xt9LlZLSUmZ0hfKYSaOBXtFcUhRDb0ZHeuUMbYGIELofFnjng5fskyxhqAfK1Cq3OqxFvj9fwh3b+jLQjfJz1G9+snRTn/FgILiYZYXBUlwIvZMeBhViNhNlBdm5lh//nRApL4yanR+BvNM69IgoWnamYM SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2018 09:34:20.1067 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 255bfe14-4770-424c-0851-08d587fc713e X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR04MB3113 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180312_023434_946627_A30AAA60 X-CRM114-Status: GOOD ( 13.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fabio.estevam@nxp.com, aisheng.dong@nxp.com, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, jacky.baip@gmail.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add pinctrl driver support for imx6sll. Signed-off-by: Bai Ping Acked-by: Shawn Guo Acked-by: Dong Aisheng --- changes v2->v3 - switch the pinctrl driver to use generic pinconfig based on imx7ulp changes v3->v4 - remove the unecessary log print - add SION support - update the license identifier to SPDX change v4->v5 - drop generic pin config, use the old fsl pin config --- arch/arm/mach-imx/Kconfig | 1 + drivers/pinctrl/freescale/Kconfig | 7 + drivers/pinctrl/freescale/Makefile | 1 + drivers/pinctrl/freescale/pinctrl-imx6sll.c | 360 ++++++++++++++++++++++++++++ 4 files changed, 369 insertions(+) create mode 100644 drivers/pinctrl/freescale/pinctrl-imx6sll.c diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 8e3a618..cb010a0 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -514,6 +514,7 @@ config SOC_IMX6SL config SOC_IMX6SLL bool "i.MX6 SoloLiteLite support" + select PINCTRL_IMX6SLL select SOC_IMX6 help diff --git a/drivers/pinctrl/freescale/Kconfig b/drivers/pinctrl/freescale/Kconfig index 4dbc576..b4886ee 100644 --- a/drivers/pinctrl/freescale/Kconfig +++ b/drivers/pinctrl/freescale/Kconfig @@ -82,6 +82,13 @@ config PINCTRL_IMX6SL help Say Y here to enable the imx6sl pinctrl driver +config PINCTRL_IMX6SLL + bool "IMX6SL pinctrl driver" + depends on SOC_IMX6SLL + select PINCTRL_IMX + help + Say Y here to enable the imx6sl pinctrl driver + config PINCTRL_IMX6SX bool "IMX6SX pinctrl driver" depends on SOC_IMX6SX diff --git a/drivers/pinctrl/freescale/Makefile b/drivers/pinctrl/freescale/Makefile index 19bb9a5..368be8c 100644 --- a/drivers/pinctrl/freescale/Makefile +++ b/drivers/pinctrl/freescale/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_PINCTRL_IMX53) += pinctrl-imx53.o obj-$(CONFIG_PINCTRL_IMX6Q) += pinctrl-imx6q.o obj-$(CONFIG_PINCTRL_IMX6Q) += pinctrl-imx6dl.o obj-$(CONFIG_PINCTRL_IMX6SL) += pinctrl-imx6sl.o +obj-$(CONFIG_PINCTRL_IMX6SLL) += pinctrl-imx6sll.o obj-$(CONFIG_PINCTRL_IMX6SX) += pinctrl-imx6sx.o obj-$(CONFIG_PINCTRL_IMX6UL) += pinctrl-imx6ul.o obj-$(CONFIG_PINCTRL_IMX7D) += pinctrl-imx7d.o diff --git a/drivers/pinctrl/freescale/pinctrl-imx6sll.c b/drivers/pinctrl/freescale/pinctrl-imx6sll.c new file mode 100644 index 0000000..2698375 --- /dev/null +++ b/drivers/pinctrl/freescale/pinctrl-imx6sll.c @@ -0,0 +1,360 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2018 NXP. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "pinctrl-imx.h" + +enum imx6sll_pads { + MX6SLL_PAD_RESERVE0 = 0, + MX6SLL_PAD_RESERVE1 = 1, + MX6SLL_PAD_RESERVE2 = 2, + MX6SLL_PAD_RESERVE3 = 3, + MX6SLL_PAD_RESERVE4 = 4, + MX6SLL_PAD_WDOG_B = 5, + MX6SLL_PAD_REF_CLK_24M = 6, + MX6SLL_PAD_REF_CLK_32K = 7, + MX6SLL_PAD_PWM1 = 8, + MX6SLL_PAD_KEY_COL0 = 9, + MX6SLL_PAD_KEY_ROW0 = 10, + MX6SLL_PAD_KEY_COL1 = 11, + MX6SLL_PAD_KEY_ROW1 = 12, + MX6SLL_PAD_KEY_COL2 = 13, + MX6SLL_PAD_KEY_ROW2 = 14, + MX6SLL_PAD_KEY_COL3 = 15, + MX6SLL_PAD_KEY_ROW3 = 16, + MX6SLL_PAD_KEY_COL4 = 17, + MX6SLL_PAD_KEY_ROW4 = 18, + MX6SLL_PAD_KEY_COL5 = 19, + MX6SLL_PAD_KEY_ROW5 = 20, + MX6SLL_PAD_KEY_COL6 = 21, + MX6SLL_PAD_KEY_ROW6 = 22, + MX6SLL_PAD_KEY_COL7 = 23, + MX6SLL_PAD_KEY_ROW7 = 24, + MX6SLL_PAD_EPDC_DATA00 = 25, + MX6SLL_PAD_EPDC_DATA01 = 26, + MX6SLL_PAD_EPDC_DATA02 = 27, + MX6SLL_PAD_EPDC_DATA03 = 28, + MX6SLL_PAD_EPDC_DATA04 = 29, + MX6SLL_PAD_EPDC_DATA05 = 30, + MX6SLL_PAD_EPDC_DATA06 = 31, + MX6SLL_PAD_EPDC_DATA07 = 32, + MX6SLL_PAD_EPDC_DATA08 = 33, + MX6SLL_PAD_EPDC_DATA09 = 34, + MX6SLL_PAD_EPDC_DATA10 = 35, + MX6SLL_PAD_EPDC_DATA11 = 36, + MX6SLL_PAD_EPDC_DATA12 = 37, + MX6SLL_PAD_EPDC_DATA13 = 38, + MX6SLL_PAD_EPDC_DATA14 = 39, + MX6SLL_PAD_EPDC_DATA15 = 40, + MX6SLL_PAD_EPDC_SDCLK = 41, + MX6SLL_PAD_EPDC_SDLE = 42, + MX6SLL_PAD_EPDC_SDOE = 43, + MX6SLL_PAD_EPDC_SDSHR = 44, + MX6SLL_PAD_EPDC_SDCE0 = 45, + MX6SLL_PAD_EPDC_SDCE1 = 46, + MX6SLL_PAD_EPDC_SDCE2 = 47, + MX6SLL_PAD_EPDC_SDCE3 = 48, + MX6SLL_PAD_EPDC_GDCLK = 49, + MX6SLL_PAD_EPDC_GDOE = 50, + MX6SLL_PAD_EPDC_GDRL = 51, + MX6SLL_PAD_EPDC_GDSP = 52, + MX6SLL_PAD_EPDC_VCOM0 = 53, + MX6SLL_PAD_EPDC_VCOM1 = 54, + MX6SLL_PAD_EPDC_BDR0 = 55, + MX6SLL_PAD_EPDC_BDR1 = 56, + MX6SLL_PAD_EPDC_PWR_CTRL0 = 57, + MX6SLL_PAD_EPDC_PWR_CTRL1 = 58, + MX6SLL_PAD_EPDC_PWR_CTRL2 = 59, + MX6SLL_PAD_EPDC_PWR_CTRL3 = 60, + MX6SLL_PAD_EPDC_PWR_COM = 61, + MX6SLL_PAD_EPDC_PWR_INT = 62, + MX6SLL_PAD_EPDC_PWR_STAT = 63, + MX6SLL_PAD_EPDC_PWR_WAKE = 64, + MX6SLL_PAD_LCD_CLK = 65, + MX6SLL_PAD_LCD_ENABLE = 66, + MX6SLL_PAD_LCD_HSYNC = 67, + MX6SLL_PAD_LCD_VSYNC = 68, + MX6SLL_PAD_LCD_RESET = 69, + MX6SLL_PAD_LCD_DATA00 = 70, + MX6SLL_PAD_LCD_DATA01 = 71, + MX6SLL_PAD_LCD_DATA02 = 72, + MX6SLL_PAD_LCD_DATA03 = 73, + MX6SLL_PAD_LCD_DATA04 = 74, + MX6SLL_PAD_LCD_DATA05 = 75, + MX6SLL_PAD_LCD_DATA06 = 76, + MX6SLL_PAD_LCD_DATA07 = 77, + MX6SLL_PAD_LCD_DATA08 = 78, + MX6SLL_PAD_LCD_DATA09 = 79, + MX6SLL_PAD_LCD_DATA10 = 80, + MX6SLL_PAD_LCD_DATA11 = 81, + MX6SLL_PAD_LCD_DATA12 = 82, + MX6SLL_PAD_LCD_DATA13 = 83, + MX6SLL_PAD_LCD_DATA14 = 84, + MX6SLL_PAD_LCD_DATA15 = 85, + MX6SLL_PAD_LCD_DATA16 = 86, + MX6SLL_PAD_LCD_DATA17 = 87, + MX6SLL_PAD_LCD_DATA18 = 88, + MX6SLL_PAD_LCD_DATA19 = 89, + MX6SLL_PAD_LCD_DATA20 = 90, + MX6SLL_PAD_LCD_DATA21 = 91, + MX6SLL_PAD_LCD_DATA22 = 92, + MX6SLL_PAD_LCD_DATA23 = 93, + MX6SLL_PAD_AUD_RXFS = 94, + MX6SLL_PAD_AUD_RXC = 95, + MX6SLL_PAD_AUD_RXD = 96, + MX6SLL_PAD_AUD_TXC = 97, + MX6SLL_PAD_AUD_TXFS = 98, + MX6SLL_PAD_AUD_TXD = 99, + MX6SLL_PAD_AUD_MCLK = 100, + MX6SLL_PAD_UART1_RXD = 101, + MX6SLL_PAD_UART1_TXD = 102, + MX6SLL_PAD_I2C1_SCL = 103, + MX6SLL_PAD_I2C1_SDA = 104, + MX6SLL_PAD_I2C2_SCL = 105, + MX6SLL_PAD_I2C2_SDA = 106, + MX6SLL_PAD_ECSPI1_SCLK = 107, + MX6SLL_PAD_ECSPI1_MOSI = 108, + MX6SLL_PAD_ECSPI1_MISO = 109, + MX6SLL_PAD_ECSPI1_SS0 = 110, + MX6SLL_PAD_ECSPI2_SCLK = 111, + MX6SLL_PAD_ECSPI2_MOSI = 112, + MX6SLL_PAD_ECSPI2_MISO = 113, + MX6SLL_PAD_ECSPI2_SS0 = 114, + MX6SLL_PAD_SD1_CLK = 115, + MX6SLL_PAD_SD1_CMD = 116, + MX6SLL_PAD_SD1_DATA0 = 117, + MX6SLL_PAD_SD1_DATA1 = 118, + MX6SLL_PAD_SD1_DATA2 = 119, + MX6SLL_PAD_SD1_DATA3 = 120, + MX6SLL_PAD_SD1_DATA4 = 121, + MX6SLL_PAD_SD1_DATA5 = 122, + MX6SLL_PAD_SD1_DATA6 = 123, + MX6SLL_PAD_SD1_DATA7 = 124, + MX6SLL_PAD_SD2_RESET = 125, + MX6SLL_PAD_SD2_CLK = 126, + MX6SLL_PAD_SD2_CMD = 127, + MX6SLL_PAD_SD2_DATA0 = 128, + MX6SLL_PAD_SD2_DATA1 = 129, + MX6SLL_PAD_SD2_DATA2 = 130, + MX6SLL_PAD_SD2_DATA3 = 131, + MX6SLL_PAD_SD2_DATA4 = 132, + MX6SLL_PAD_SD2_DATA5 = 133, + MX6SLL_PAD_SD2_DATA6 = 134, + MX6SLL_PAD_SD2_DATA7 = 135, + MX6SLL_PAD_SD3_CLK = 136, + MX6SLL_PAD_SD3_CMD = 137, + MX6SLL_PAD_SD3_DATA0 = 138, + MX6SLL_PAD_SD3_DATA1 = 139, + MX6SLL_PAD_SD3_DATA2 = 140, + MX6SLL_PAD_SD3_DATA3 = 141, + MX6SLL_PAD_GPIO4_IO20 = 142, + MX6SLL_PAD_GPIO4_IO21 = 143, + MX6SLL_PAD_GPIO4_IO19 = 144, + MX6SLL_PAD_GPIO4_IO25 = 145, + MX6SLL_PAD_GPIO4_IO18 = 146, + MX6SLL_PAD_GPIO4_IO24 = 147, + MX6SLL_PAD_GPIO4_IO23 = 148, + MX6SLL_PAD_GPIO4_IO17 = 149, + MX6SLL_PAD_GPIO4_IO22 = 150, + MX6SLL_PAD_GPIO4_IO16 = 151, + MX6SLL_PAD_GPIO4_IO26 = 152, +}; + +/* Pad names for the pinmux subsystem */ +static const struct pinctrl_pin_desc imx6sll_pinctrl_pads[] = { + IMX_PINCTRL_PIN(MX6SLL_PAD_RESERVE0), + IMX_PINCTRL_PIN(MX6SLL_PAD_RESERVE1), + IMX_PINCTRL_PIN(MX6SLL_PAD_RESERVE2), + IMX_PINCTRL_PIN(MX6SLL_PAD_RESERVE3), + IMX_PINCTRL_PIN(MX6SLL_PAD_RESERVE4), + IMX_PINCTRL_PIN(MX6SLL_PAD_WDOG_B), + IMX_PINCTRL_PIN(MX6SLL_PAD_REF_CLK_24M), + IMX_PINCTRL_PIN(MX6SLL_PAD_REF_CLK_32K), + IMX_PINCTRL_PIN(MX6SLL_PAD_PWM1), + IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_COL0), + IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_ROW0), + IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_COL1), + IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_ROW1), + IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_COL2), + IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_ROW2), + IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_COL3), + IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_ROW3), + IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_COL4), + IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_ROW4), + IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_COL5), + IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_ROW5), + IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_COL6), + IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_ROW6), + IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_COL7), + IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_ROW7), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA00), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA01), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA02), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA03), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA04), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA05), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA06), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA07), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA08), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA09), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA10), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA11), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA12), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA13), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA14), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA15), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_SDCLK), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_SDLE), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_SDOE), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_SDSHR), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_SDCE0), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_SDCE1), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_SDCE2), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_SDCE3), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_GDCLK), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_GDOE), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_GDRL), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_GDSP), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_VCOM0), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_VCOM1), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_BDR0), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_BDR1), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_PWR_CTRL0), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_PWR_CTRL1), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_PWR_CTRL2), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_PWR_CTRL3), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_PWR_COM), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_PWR_INT), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_PWR_STAT), + IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_PWR_WAKE), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_CLK), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_ENABLE), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_HSYNC), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_VSYNC), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_RESET), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA00), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA01), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA02), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA03), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA04), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA05), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA06), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA07), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA08), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA09), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA10), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA11), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA12), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA13), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA14), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA15), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA16), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA17), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA18), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA19), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA20), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA21), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA22), + IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA23), + IMX_PINCTRL_PIN(MX6SLL_PAD_AUD_RXFS), + IMX_PINCTRL_PIN(MX6SLL_PAD_AUD_RXC), + IMX_PINCTRL_PIN(MX6SLL_PAD_AUD_RXD), + IMX_PINCTRL_PIN(MX6SLL_PAD_AUD_TXC), + IMX_PINCTRL_PIN(MX6SLL_PAD_AUD_TXFS), + IMX_PINCTRL_PIN(MX6SLL_PAD_AUD_TXD), + IMX_PINCTRL_PIN(MX6SLL_PAD_AUD_MCLK), + IMX_PINCTRL_PIN(MX6SLL_PAD_UART1_RXD), + IMX_PINCTRL_PIN(MX6SLL_PAD_UART1_TXD), + IMX_PINCTRL_PIN(MX6SLL_PAD_I2C1_SCL), + IMX_PINCTRL_PIN(MX6SLL_PAD_I2C1_SDA), + IMX_PINCTRL_PIN(MX6SLL_PAD_I2C2_SCL), + IMX_PINCTRL_PIN(MX6SLL_PAD_I2C2_SDA), + IMX_PINCTRL_PIN(MX6SLL_PAD_ECSPI1_SCLK), + IMX_PINCTRL_PIN(MX6SLL_PAD_ECSPI1_MOSI), + IMX_PINCTRL_PIN(MX6SLL_PAD_ECSPI1_MISO), + IMX_PINCTRL_PIN(MX6SLL_PAD_ECSPI1_SS0), + IMX_PINCTRL_PIN(MX6SLL_PAD_ECSPI2_SCLK), + IMX_PINCTRL_PIN(MX6SLL_PAD_ECSPI2_MOSI), + IMX_PINCTRL_PIN(MX6SLL_PAD_ECSPI2_MISO), + IMX_PINCTRL_PIN(MX6SLL_PAD_ECSPI2_SS0), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_CLK), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_CMD), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_DATA0), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_DATA1), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_DATA2), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_DATA3), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_DATA4), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_DATA5), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_DATA6), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_DATA7), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_RESET), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_CLK), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_CMD), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_DATA0), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_DATA1), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_DATA2), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_DATA3), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_DATA4), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_DATA5), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_DATA6), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_DATA7), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD3_CLK), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD3_CMD), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD3_DATA0), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD3_DATA1), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD3_DATA2), + IMX_PINCTRL_PIN(MX6SLL_PAD_SD3_DATA3), + IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO20), + IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO21), + IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO19), + IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO25), + IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO18), + IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO24), + IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO23), + IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO17), + IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO22), + IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO16), + IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO26), +}; + +static const struct imx_pinctrl_soc_info imx6sll_pinctrl_info = { + .pins = imx6sll_pinctrl_pads, + .npins = ARRAY_SIZE(imx6sll_pinctrl_pads), + .gpr_compatible = "fsl,imx6sll-iomuxc-gpr", +}; + +static const struct of_device_id imx6sll_pinctrl_of_match[] = { + { .compatible = "fsl,imx6sll-iomuxc", .data = &imx6sll_pinctrl_info, }, + { /* sentinel */ } +}; + +static int imx6sll_pinctrl_probe(struct platform_device *pdev) +{ + return imx_pinctrl_probe(pdev, &imx6sll_pinctrl_info); +} + +static struct platform_driver imx6sll_pinctrl_driver = { + .driver = { + .name = "imx6sll-pinctrl", + .of_match_table = of_match_ptr(imx6sll_pinctrl_of_match), + }, + .probe = imx6sll_pinctrl_probe, +}; + +static int __init imx6sll_pinctrl_init(void) +{ + return platform_driver_register(&imx6sll_pinctrl_driver); +} +arch_initcall(imx6sll_pinctrl_init);