From patchwork Thu Mar 15 14:31:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shanker Donthineni X-Patchwork-Id: 10284583 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 08894602C2 for ; Thu, 15 Mar 2018 14:31:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ECDDC28ABE for ; Thu, 15 Mar 2018 14:31:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E0CBC28AC3; Thu, 15 Mar 2018 14:31:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3742B28ABE for ; Thu, 15 Mar 2018 14:31:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=i1EdR6nNcsn74VE9bU3s31Iyv69tmatkA/yvvbvmLIg=; b=jUu sNEeGnOC1TWWpE+9eOleAkX0hs3zoQfSoNUrjbgn4R5wzmubpAH29IP9wIH+UTbkKxq+JHWzx2K8e m8ZXOjvLzVio1lupSKUOW0kz1dSZBNySVOkhqrryleING8odWW/wKavQ7GI0irsgrh9ONbEnLBUij wRmJWbvjAuJC+a4jkOSzDSfKxRkv9fKzpl1xYm61HZSVNTiS1VKLGF0+X809eaRlJbPCmkKFLBEsE lcXzU5rsaDVMq3N+fv20BkuvUAU36wiVJvE+P0e0srcwVbF5t/r3XwYHcfK2CzTX4CrVfzB+GAF8A vih9e16Ce0MU6n5UGncrkDTgpo1E+hg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1ewTv1-0002VZ-1Q; Thu, 15 Mar 2018 14:31:47 +0000 Received: from smtp.codeaurora.org ([198.145.29.96]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1ewTuw-0002PK-6P for linux-arm-kernel@lists.infradead.org; Thu, 15 Mar 2018 14:31:45 +0000 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 5105360452; Thu, 15 Mar 2018 14:31:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1521124291; bh=CHEKOzNSbY27N5v4E2JOat9d006GuRH8cSSEBmn94c4=; h=From:To:Cc:Subject:Date:From; b=dv25TrMEbb9azJ6mmzXzOyL1r7hbsERHh/2svK8oz+44wFMW9RG1Tiug88PpQnrDB myQqUTWJ/1O45GFD4znJf+BxTOjEZ5FrHbhRyQX4aQuzc88pYLP8R7x1BP7urj2ENl tTuhmiob4YMSRAX/eRopOd0+JDw57vNag2Vy/EWA= Received: from shankerd-ubuntu.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: shankerd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id B471860452; Thu, 15 Mar 2018 14:31:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1521124290; bh=CHEKOzNSbY27N5v4E2JOat9d006GuRH8cSSEBmn94c4=; h=From:To:Cc:Subject:Date:From; b=ZpPOAkV+NQRNrGroOr8QtkVkBFA4Tfl2uhG9uHAiraWk+upler0JF3RTe2AJkxahK cRKlzYAHkORiwFOot6ARr/5whFxSXNQo/UgmhK+n72xXpI7GWqEW0inLyEJJoJr0wS OOwIl/nDUNx+1rhhM7LDr9W1PFnuvkWqWLaofAxc= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org B471860452 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=shankerd@codeaurora.org From: Shanker Donthineni To: Marc Zyngier , linux-kernel , linux-arm-kernel Subject: [PATCH v2] irqchip/gic-v3: Ensure GICR_CTLR.EnableLPI=0 is observed before enabling Date: Thu, 15 Mar 2018 09:31:27 -0500 Message-Id: <1521124287-25009-1-git-send-email-shankerd@codeaurora.org> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180315_073142_398495_290C16B7 X-CRM114-Status: GOOD ( 18.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Thomas Gleixner , Shanker Donthineni , Jason Cooper , Vikram Sethi MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The definition of the GICR_CTLR.RWP control bit was expanded to indicate status of changing GICR_CTLR.EnableLPI from 1 to 0 is being in progress or completed. Software must observe GICR_CTLR.RWP==0 after clearing GICR_CTLR.EnableLPI from 1 to 0 and before writing GICR_PENDBASER and/or GICR_PROPBASER, otherwise behavior is UNPREDICTABLE. Signed-off-by: Shanker Donthineni --- Changes since v1: -Moved LPI disable code to a seperate function as Marc suggested. -Mark's suggestion to use readl_relaxed_poll_timeout() helper functions. drivers/irqchip/irq-gic-v3-its.c | 66 ++++++++++++++++++++++++++++++-------- include/linux/irqchip/arm-gic-v3.h | 1 + 2 files changed, 53 insertions(+), 14 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 1d3056f..cba71a7 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -33,6 +33,8 @@ #include #include #include +#include +#include #include #include @@ -1875,16 +1877,6 @@ static void its_cpu_init_lpis(void) gic_data_rdist()->pend_page = pend_page; } - /* Disable LPIs */ - val = readl_relaxed(rbase + GICR_CTLR); - val &= ~GICR_CTLR_ENABLE_LPIS; - writel_relaxed(val, rbase + GICR_CTLR); - - /* - * Make sure any change to the table is observable by the GIC. - */ - dsb(sy); - /* set PROPBASE */ val = (page_to_phys(gic_rdists->prop_page) | GICR_PROPBASER_InnerShareable | @@ -3288,13 +3280,59 @@ static bool gic_rdists_supports_plpis(void) return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); } +static int redist_disable_lpis(void) +{ + void __iomem *rbase = gic_data_rdist_rd_base(); + u64 val; + int ret; + + if (!gic_rdists_supports_plpis()) { + pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); + return -ENXIO; + } + + val = readl_relaxed(rbase + GICR_CTLR); + if (!(val & GICR_CTLR_ENABLE_LPIS)) + return 0; + + /* Disable LPIs */ + val &= ~GICR_CTLR_ENABLE_LPIS; + writel_relaxed(val, rbase + GICR_CTLR); + + /* Make sure any change to GICR_CTLR is observable by the GIC */ + dsb(sy); + + /* Wait for GICR_CTLR.GICR_CTLR_ENABLE_LPIS==0 or timeout */ + ret = readl_relaxed_poll_timeout_atomic(rbase + GICR_CTLR, val, + !(val & GICR_CTLR_ENABLE_LPIS), 1, + USEC_PER_SEC); + if (ret) { + pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); + return -EBUSY; + } + + /* Wait for GICR_CTLR.RWP==0 or timeout */ + ret = readl_relaxed_poll_timeout_atomic(rbase + GICR_CTLR, val, + !(val & GICR_CTLR_RWP), 1, + USEC_PER_SEC); + if (ret) { + pr_err("CPU%d: Failed to observe RWP==0 after enabling LPIs\n", + smp_processor_id()); + return -EBUSY; + } + + return 0; +} + int its_cpu_init(void) { + int ret; + if (!list_empty(&its_nodes)) { - if (!gic_rdists_supports_plpis()) { - pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); - return -ENXIO; - } + ret = redist_disable_lpis(); + if (ret) + return ret; + its_cpu_init_lpis(); its_cpu_init_collection(); } diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index c00c4c33..4d5fb60 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h @@ -106,6 +106,7 @@ #define GICR_PIDR2 GICD_PIDR2 #define GICR_CTLR_ENABLE_LPIS (1UL << 0) +#define GICR_CTLR_RWP (1UL << 3) #define GICR_TYPER_CPU_NUMBER(r) (((r) >> 8) & 0xffff)