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Fri, 16 Mar 2018 09:39:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1521193194; bh=qCual5UiTaXloUTC+PVn3a7SSuRQvdDa0nTU77WM3+w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MwCubyDMxA3V6HX8ezuLGWPNx3ZedqX7aWokgX4eNKc+Quqcbwj/HTOgpborGrURJ h6Xcl6XOVaFkde/v4gGxAzQW0lCDMQWksLiUj2FZoLOElL0SamxxsozG9Ul0JWxwuY U+Ao5cP8xX8tHmXMxJS1ZR9ipHYQ1CwsU61H1goM= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org C996C60C66 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sricharan@codeaurora.org From: Sricharan R To: robh+dt@kernel.org, robh@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, andy.gross@linaro.org, david.brown@linaro.org, catalin.marinas@arm.com, will.deacon@arm.com, sboyd@codeaurora.org, bjorn.andersson@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, absahu@codeaurora.org Subject: [PATCH v2 13/13] ARM: dts: ipq8074: Enable few peripherals for hk01 board Date: Fri, 16 Mar 2018 15:08:21 +0530 Message-Id: <1521193101-4586-14-git-send-email-sricharan@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1521193101-4586-1-git-send-email-sricharan@codeaurora.org> References: <1521193101-4586-1-git-send-email-sricharan@codeaurora.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180316_024009_852085_8205ED7B X-CRM114-Status: GOOD ( 11.55 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sricharan@codeaurora.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Sricharan R --- arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 103 ++++++++++++++++++++++++++++++ 1 file changed, 103 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts index 6a838b5..81dff867 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts +++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts @@ -21,6 +21,7 @@ aliases { serial0 = &blsp1_uart5; + serial1 = &serial_blsp2; }; chosen { @@ -41,6 +42,47 @@ bias-disable; }; }; + + i2c_0_pins: i2c_0_pinmux { + mux { + pins = "gpio42", "gpio43"; + function = "blsp1_i2c"; + drive-strength = <8>; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pins { + mux { + pins = "gpio38", "gpio39", "gpio40", "gpio41"; + function = "blsp0_spi"; + drive-strength = <8>; + bias-disable; + }; + }; + + hsuart_pins: hsuart_pins { + mux { + pins = "gpio46", "gpio47", "gpio48", "gpio49"; + function = "blsp2_uart"; + drive-strength = <8>; + bias-disable; + }; + }; + + qpic_pins: qpic_pins { + mux { + pins = "gpio1", "gpio3", "gpio4", + "gpio5", "gpio6", "gpio7", + "gpio8", "gpio10", "gpio11", + "gpio12", "gpio13", "gpio14", + "gpio15", "gpio16", "gpio17"; + function = "qpic"; + drive-strength = <8>; + bias-disable; + }; + }; + }; serial@78b3000 { @@ -48,5 +90,66 @@ pinctrl-names = "default"; status = "ok"; }; + + spi@78b5000 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "ok"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "n25q128a11", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + }; + }; + + serial@78B1000 { + pinctrl-0 = <&hsuart_pins>; + pinctrl-names = "default"; + status = "ok"; + }; + + i2c_0@78b6000 { + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + status = "ok"; + }; + + dma@7984000 { + status = "ok"; + }; + + nand@79b0000 { + pinctrl-0 = <&qpic_pins>; + pinctrl-names = "default"; + status = "ok"; + + nand@0 { + reg = <0>; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-bus-width = <8>; + }; + }; + + phy@86000 { + status = "ok"; + }; + + phy@8e000 { + status = "ok"; + }; + + pci@20000000 { + status = "ok"; + perst-gpio = <&tlmm 58 0x1>; + }; + + pci@10000000 { + status = "ok"; + perst-gpio = <&tlmm 61 0x1>; + }; }; };