From patchwork Wed Mar 21 15:36:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomer Maimon X-Patchwork-Id: 10299727 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C1C0B602B3 for ; Wed, 21 Mar 2018 15:41:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B4484297B5 for ; Wed, 21 Mar 2018 15:41:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AE861298C6; Wed, 21 Mar 2018 15:41:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, DKIM_VALID, FREEMAIL_FROM autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 46022297B5 for ; Wed, 21 Mar 2018 15:41:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=RpBdwLRJfvD33EaCem/2446vLzWH228jVC62UARZ8YU=; b=RlHLZkN5oiD5c4NgYtimIGeDlt OATfxBD97fsK/VkrrF2fGSM4ikmDeXfYJOkxYZNP5T4Rw8QDhKmmnUx1NAuWfk6hIsoRX/tibJLtB i4fJMR/AnB7+tU5jJGOUMaCqp3KKKd64CoUm1IqXVjKSQ32FjORelsNW0jcMdEBOTmsOA12Jy8AYl 2YQIDAn7NHG9Saq3vlElKdPsexrBvR1SGx7jK+VY64oeT5vYT4hQGXPv1JsREJ2+FPjTw6gg32fYQ UORmd3/CWwXkXw/TWHtgxdj9V6Hccy1JZd5ILesPvbj2gQU2JljYf85tZQkaPqbaWT3/GjasX6QJU x4XKQBGA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1eyfrV-0002SM-Dw; Wed, 21 Mar 2018 15:41:13 +0000 Received: from 212.199.177.27.static.012.net.il ([212.199.177.27] helo=herzl.nuvoton.co.il) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1eyfnr-0008Dg-JV for linux-arm-kernel@lists.infradead.org; Wed, 21 Mar 2018 15:37:40 +0000 Received: from talu34.nuvoton.co.il (ntil-fw [212.199.177.25]) by herzl.nuvoton.co.il (8.13.8/8.13.8) with ESMTP id w2LFIG1I014471; Wed, 21 Mar 2018 17:18:16 +0200 Received: by talu34.nuvoton.co.il (Postfix, from userid 10070) id E814A5A9FF; Wed, 21 Mar 2018 17:36:41 +0200 (IST) From: Tomer Maimon To: arnd@arndb.de, robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, brendanhiggins@google.com, avifishman70@gmail.com, joel@jms.id.au Subject: [PATCH v1 1/1] arm: dts: add Nuvoton NPCM750 device tree Date: Wed, 21 Mar 2018 17:36:17 +0200 Message-Id: <1521646577-10773-2-git-send-email-tmaimon77@gmail.com> X-Mailer: git-send-email 1.8.3.4 In-Reply-To: <1521646577-10773-1-git-send-email-tmaimon77@gmail.com> References: <1521646577-10773-1-git-send-email-tmaimon77@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180321_083729_050899_20A2BD34 X-CRM114-Status: GOOD ( 11.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: openbmc@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomer Maimon MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add a common device tree for all Nuvoton NPCM7xx BMCs and a board specific device tree for the NPCM750 (Poleg) evaluation board. Signed-off-by: Tomer Maimon --- arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 187 ++++++++++++++++++++++++++ arch/arm/boot/dts/nuvoton-npcm750-evb.dts | 39 ++++++ arch/arm/boot/dts/nuvoton-npcm750.dtsi | 45 +++++++ 4 files changed, 273 insertions(+) create mode 100644 arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi create mode 100644 arch/arm/boot/dts/nuvoton-npcm750-evb.dts create mode 100644 arch/arm/boot/dts/nuvoton-npcm750.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index ade7a38543dc..ba3bfa674e32 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -304,6 +304,8 @@ dtb-$(CONFIG_ARCH_LPC18XX) += \ dtb-$(CONFIG_ARCH_LPC32XX) += \ lpc3250-ea3250.dtb \ lpc3250-phy3250.dtb +dtb-$(CONFIG_ARCH_NPCM7XX) += \ + nuvoton-npcm750-evb.dtb dtb-$(CONFIG_MACH_MESON6) += \ meson6-atv1200.dtb dtb-$(CONFIG_MACH_MESON8) += \ diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi new file mode 100644 index 000000000000..d2d0761295a4 --- /dev/null +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi @@ -0,0 +1,187 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2018 Nuvoton Technology tomer.maimon@nuvoton.com +// Copyright 2018 Google, Inc. + +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&gic>; + + /* external reference clock */ + clk_refclk: clk_refclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + clock-output-names = "refclk"; + }; + + /* external reference clock for cpu. float in normal operation */ + clk_sysbypck: clk_sysbypck { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <800000000>; + clock-output-names = "sysbypck"; + }; + + /* external reference clock for MC. float in normal operation */ + clk_mcbypck: clk_mcbypck { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <800000000>; + clock-output-names = "mcbypck"; + }; + + /* external clock signal rg1refck, supplied by the phy */ + clk_rg1refck: clk_rg1refck { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + clock-output-names = "clk_rg1refck"; + }; + + /* external clock signal rg2refck, supplied by the phy */ + clk_rg2refck: clk_rg2refck { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + clock-output-names = "clk_rg2refck"; + }; + + clk_xin: clk_xin { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + clock-output-names = "clk_xin"; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + interrupt-parent = <&gic>; + ranges = <0x0 0xf0000000 0x00900000>; + + gcr: gcr@800000 { + compatible = "nuvoton,npcm750-gcr", "syscon", + "simple-mfd"; + reg = <0x800000 0x1000>; + }; + + scu: scu@3fe000 { + compatible = "arm,cortex-a9-scu"; + reg = <0x3fe000 0x1000>; + }; + + l2: cache-controller@3fc000 { + compatible = "arm,pl310-cache"; + reg = <0x3fc000 0x1000>; + interrupts = ; + cache-unified; + cache-level = <2>; + clocks = <&clk 10>; + arm,shared-override; + }; + + gic: interrupt-controller@3ff000 { + compatible = "arm,cortex-a9-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x3ff000 0x1000>, + <0x3fe100 0x100>; + }; + }; + + ahb { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + interrupt-parent = <&gic>; + ranges; + + clk: clock-controller@f0801000 { + compatible = "nuvoton,npcm750-clk", "syscon"; + #clock-cells = <1>; + clock-controller; + reg = <0xf0801000 0x1000>; + clock-names = "refclk", "sysbypck", "mcbypck"; + clocks = <&clk_refclk>, <&clk_sysbypck>, <&clk_mcbypck>; + }; + + apb { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + interrupt-parent = <&gic>; + ranges = <0x0 0xf0000000 0x00300000>; + + timer0: timer@8000 { + compatible = "nuvoton,npcm750-timer"; + interrupts = ; + reg = <0x8000 0x50>; + clocks = <&clk 5>; + }; + + watchdog0: watchdog@801C { + compatible = "nuvoton,npcm750-wdt"; + interrupts = ; + reg = <0x801C 0x4>; + status = "disabled"; + clocks = <&clk 5>; + }; + + watchdog1: watchdog@901C { + compatible = "nuvoton,npcm750-wdt"; + interrupts = ; + reg = <0x901C 0x4>; + status = "disabled"; + clocks = <&clk 5>; + }; + + watchdog2: watchdog@a01C { + compatible = "nuvoton,npcm750-wdt"; + interrupts = ; + reg = <0xa01C 0x4>; + status = "disabled"; + clocks = <&clk 5>; + }; + + serial0: serial@1000 { + compatible = "nuvoton,npcm750-uart"; + reg = <0x1000 0x1000>; + clocks = <&clk 6>; + interrupts = ; + reg-shift = <2>; + status = "disabled"; + }; + + serial1: serial@2000 { + compatible = "nuvoton,npcm750-uart"; + reg = <0x2000 0x1000>; + clocks = <&clk 6>; + interrupts = ; + reg-shift = <2>; + status = "disabled"; + }; + + serial2: serial@3000 { + compatible = "nuvoton,npcm750-uart"; + reg = <0x3000 0x1000>; + clocks = <&clk 6>; + interrupts = ; + reg-shift = <2>; + status = "disabled"; + }; + + serial3: serial@4000 { + compatible = "nuvoton,npcm750-uart"; + reg = <0x4000 0x1000>; + clocks = <&clk 6>; + interrupts = ; + reg-shift = <2>; + status = "disabled"; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/nuvoton-npcm750-evb.dts b/arch/arm/boot/dts/nuvoton-npcm750-evb.dts new file mode 100644 index 000000000000..15f744f1beea --- /dev/null +++ b/arch/arm/boot/dts/nuvoton-npcm750-evb.dts @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2018 Nuvoton Technology tomer.maimon@nuvoton.com +// Copyright 2018 Google, Inc. + +/dts-v1/; +#include "nuvoton-npcm750.dtsi" + +/ { + model = "Nuvoton npcm750 Development Board (Device Tree)"; + compatible = "nuvoton,npcm750"; + + chosen { + stdout-path = &serial3; + }; + + memory { + reg = <0 0x40000000>; + }; +}; + +&watchdog1 { + status = "okay"; +}; + +&serial0 { + status = "okay"; +}; + +&serial1 { + status = "okay"; +}; + +&serial2 { + status = "okay"; +}; + +&serial3 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/nuvoton-npcm750.dtsi b/arch/arm/boot/dts/nuvoton-npcm750.dtsi new file mode 100644 index 000000000000..5afdc730fc4a --- /dev/null +++ b/arch/arm/boot/dts/nuvoton-npcm750.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2018 Nuvoton Technology tomer.maimon@nuvoton.com +// Copyright 2018 Google, Inc. + +#include +#include "nuvoton-common-npcm7xx.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + enable-method = "nuvoton,npcm750-smp"; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + clocks = <&clk 0>; + clock-names = "clk_cpu"; + reg = <0>; + next-level-cache = <&l2>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + clocks = <&clk 0>; + clock-names = "clk_cpu"; + reg = <1>; + next-level-cache = <&l2>; + }; + }; + soc { + timer@3fe600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x3fe600 0x20>; + interrupts = ; + clocks = <&clk 5>; + }; + }; +};