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Fri, 23 Mar 2018 22:23:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1521843797; bh=v+h4GXmyu/tKzKBRDO+IdYEuRqQDlxUYkWkFq23fhC0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dHg5HkYER5preAhLbQHeyodgDCiA4HRDg4da4zuG5y+So2T/SSgaM6x+JeP9G0TTZ qN6FENmnsK+ivys6Fyu5slj6zDED/q+4Fhw1xMTYAIX3XbxIx1kEN+5BE4nUsxtTBw RuCX/03fsgxpN3W4fNuRFuhHxanMoMrRryG0aN4E= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org BD44B601D3 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org From: Sinan Kaya To: netdev@vger.kernel.org, timur@codeaurora.org, sulrich@codeaurora.org Subject: [PATCH v6 1/6] net: qla3xxx: Eliminate duplicate barriers on weakly-ordered archs Date: Fri, 23 Mar 2018 18:23:06 -0400 Message-Id: <1521843791-21201-2-git-send-email-okaya@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1521843791-21201-1-git-send-email-okaya@codeaurora.org> References: <1521843791-21201-1-git-send-email-okaya@codeaurora.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180323_152327_295910_BAD6F049 X-CRM114-Status: GOOD ( 12.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sinan Kaya , linux-arm-msm@vger.kernel.org, Dept-GELinuxNICDev@cavium.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Code includes wmb() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Since code already has an explicit barrier call, changing code to wmb() writel_relaxed() mmiowb() for multi-arch support. Signed-off-by: Sinan Kaya --- drivers/net/ethernet/qlogic/qla3xxx.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/qlogic/qla3xxx.c b/drivers/net/ethernet/qlogic/qla3xxx.c index 9e5264d..b48f761 100644 --- a/drivers/net/ethernet/qlogic/qla3xxx.c +++ b/drivers/net/ethernet/qlogic/qla3xxx.c @@ -1858,8 +1858,9 @@ static void ql_update_small_bufq_prod_index(struct ql3_adapter *qdev) qdev->small_buf_release_cnt -= 8; } wmb(); - writel(qdev->small_buf_q_producer_index, - &port_regs->CommonRegs.rxSmallQProducerIndex); + writel_relaxed(qdev->small_buf_q_producer_index, + &port_regs->CommonRegs.rxSmallQProducerIndex); + mmiowb(); } }