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Wed, 11 Apr 2018 14:03:39 +0000 From: Abel Vesa To: Shawn Guo , Fabio Estevam , Michael Turquette , Stephen Boyd , linux-kernel@vger.kernel.org, Abel Vesa , linux-imx@nxp.com Subject: [PATCH v2] clk: imx: Set CLK_SET_RATE_GATE for gate and divider clocks Date: Wed, 11 Apr 2018 17:03:29 +0300 Message-Id: <1523455409-7771-1-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1521812006-6173-1-git-send-email-abel.vesa@nxp.com> References: <1521812006-6173-1-git-send-email-abel.vesa@nxp.com> MIME-Version: 1.0 X-Originating-IP: [95.76.156.53] X-ClientProxiedBy: HE1PR05CA0266.eurprd05.prod.outlook.com (2603:10a6:3:fc::18) To AM4PR04MB1601.eurprd04.prod.outlook.com (2a01:111:e400:59e5::19) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(7020095)(4652020)(5600026)(4534165)(4627221)(201703031133081)(201702281549075)(48565401081)(2017052603328)(7153060)(7193020); SRVR:AM4PR04MB1601; X-Microsoft-Exchange-Diagnostics: 1; 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Rate cannot be changed when the clock is enabled due to the glitchy multiplexers. Signed-off-by: Shawn Guo [initial patch from imx internal repo] Signed-off-by: Abel Vesa [carried over from 3.14 and also applied the flag to newer functions] --- Changes since v1: - changed ownership as per initial patch drivers/clk/imx/clk.h | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index 8076ec0..753ebc4 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -96,7 +96,8 @@ static inline struct clk *imx_clk_fixed_factor(const char *name, static inline struct clk *imx_clk_divider(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width) { - return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT, + return clk_register_divider(NULL, name, parent, + CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, reg, shift, width, 0, &imx_ccm_lock); } @@ -140,7 +141,8 @@ static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent, static inline struct clk *imx_clk_gate2(const char *name, const char *parent, void __iomem *reg, u8 shift) { - return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, + return clk_register_gate2(NULL, name, parent, + CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, reg, shift, 0x3, 0, &imx_ccm_lock, NULL); } @@ -155,7 +157,8 @@ static inline struct clk *imx_clk_gate2_shared(const char *name, const char *parent, void __iomem *reg, u8 shift, unsigned int *share_count) { - return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, + return clk_register_gate2(NULL, name, parent, + CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, reg, shift, 0x3, 0, &imx_ccm_lock, share_count); } @@ -164,8 +167,8 @@ static inline struct clk *imx_clk_gate2_shared2(const char *name, unsigned int *share_count) { return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT | - CLK_OPS_PARENT_ENABLE, reg, shift, 0x3, 0, - &imx_ccm_lock, share_count); + CLK_SET_RATE_GATE | CLK_OPS_PARENT_ENABLE, + reg, shift, 0x3, 0, &imx_ccm_lock, share_count); } static inline struct clk *imx_clk_gate2_cgr(const char *name, @@ -187,7 +190,7 @@ static inline struct clk *imx_clk_gate4(const char *name, const char *parent, void __iomem *reg, u8 shift) { return clk_register_gate2(NULL, name, parent, - CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, + CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE | CLK_OPS_PARENT_ENABLE, reg, shift, 0x3, 0, &imx_ccm_lock, NULL); }