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Tue, 24 Apr 2018 11:41:50 +0200 Received: from localhost (10.201.20.5) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 24 Apr 2018 11:41:49 +0200 From: Amelie Delaunay To: Maxime Coquelin , Alexandre Torgue , Rob Herring , Mark Rutland , Russell King , Arnd Bergmann , Kishon Vijay Abraham I Subject: [PATCH v2 1/4] ARM: dts: stm32: add USBPHYC support to stm32mp157c Date: Tue, 24 Apr 2018 11:41:42 +0200 Message-ID: <1524562905-19361-2-git-send-email-amelie.delaunay@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1524562905-19361-1-git-send-email-amelie.delaunay@st.com> References: <1524562905-19361-1-git-send-email-amelie.delaunay@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.20.5] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-04-24_02:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180424_054226_485023_AFF81FC5 X-CRM114-Status: GOOD ( 14.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Amelie Delaunay , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for USBPHYC (USB PHY Controller) to STM32MP157C SoC. It manages two usb2 ports. Signed-off-by: Amelie Delaunay --- arch/arm/boot/dts/stm32mp157c.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi index bc3eddc..547b18e 100644 --- a/arch/arm/boot/dts/stm32mp157c.dtsi +++ b/arch/arm/boot/dts/stm32mp157c.dtsi @@ -5,6 +5,7 @@ */ #include #include +#include / { #address-cells = <1>; @@ -167,6 +168,26 @@ #reset-cells = <1>; }; + usbphyc: usbphyc@5a006000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32mp1-usbphyc"; + reg = <0x5a006000 0x1000>; + clocks = <&rcc USBPHY_K>; + resets = <&rcc USBPHY_R>; + status = "disabled"; + + usbphyc_port0: usb-phy@0 { + #phy-cells = <0>; + reg = <0>; + }; + + usbphyc_port1: usb-phy@1 { + #phy-cells = <1>; + reg = <1>; + }; + }; + usart1: serial@5c000000 { compatible = "st,stm32h7-uart"; reg = <0x5c000000 0x400>;