From patchwork Tue Jun 12 13:14:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ludovic BARRE X-Patchwork-Id: 10460291 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A70186020F for ; Tue, 12 Jun 2018 13:22:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 92DFF28705 for ; Tue, 12 Jun 2018 13:22:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 858D028762; Tue, 12 Jun 2018 13:22:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0B64128705 for ; Tue, 12 Jun 2018 13:22:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=/7rQcpySYshcgtdWs2XO9Bq2MtX1P9I5YnRoMJuUt7Y=; b=qQtfb8QSpohIVE wBVSvo+jkAz4kqkAFFdVjAlmCERp+gnK6dX/pFoLatp++WHK3VyxNdU6TkL+ufytyWld5lHV/SntO COG2ykULQm2TRpRqQP9HJqG1/AC5Ah+LGFP8lvcS6si94KuxLOwm+gR2IVshrNS+Bd+SlVbBsEjQD HZcqaxhwJyDTwF7h7QzOfa9j4Ab7qfqP3zzV5NFUNJ6sDprf8ber7Fr47EhOedCoWuwp8ho3CwwTw ckAnb2uQOW+DOUn1hMVINgic7wGje5b3TahLvHMil5sAz8J/51ecfFTXJnYNSA+ripOIQk/kNjBJz Yxdqm5awyye+tEVBvy+A==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fSjFg-0003Gn-RB; Tue, 12 Jun 2018 13:22:24 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93] helo=mx07-00178001.pphosted.com) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fSj9o-0006RC-02 for linux-arm-kernel@lists.infradead.org; Tue, 12 Jun 2018 13:16:42 +0000 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w5CDE3wd017831; Tue, 12 Jun 2018 15:16:08 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2jjegrr43s-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 12 Jun 2018 15:16:07 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 1657543; Tue, 12 Jun 2018 13:16:03 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C2EC8A54A; Tue, 12 Jun 2018 13:16:02 +0000 (GMT) Received: from SAFEX1HUBCAS21.st.com (10.75.90.44) by SAFEX1HUBCAS23.st.com (10.75.90.46) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 12 Jun 2018 15:16:02 +0200 Received: from lmecxl0923.lme.st.com (10.48.0.237) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 12 Jun 2018 15:16:02 +0200 From: Ludovic Barre To: Ulf Hansson , Rob Herring Subject: [PATCH 12/19] mmc: mmci: add variant property to request a reset Date: Tue, 12 Jun 2018 15:14:33 +0200 Message-ID: <1528809280-31116-13-git-send-email-ludovic.Barre@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528809280-31116-1-git-send-email-ludovic.Barre@st.com> References: <1528809280-31116-1-git-send-email-ludovic.Barre@st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.0.237] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-06-12_01:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180612_061620_374715_73E6700B X-CRM114-Status: GOOD ( 15.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Alexandre Torgue , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Ludovic Barre , Maxime Coquelin , Gerald Baeza , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ludovic Barre Some variants could require a reset. STM32 sdmmc variant needs to reset hardware block during the power cycle procedure (for re-initialization) Signed-off-by: Ludovic Barre --- Documentation/devicetree/bindings/mmc/mmci.txt | 2 ++ drivers/mmc/host/mmci.c | 9 +++++++++ drivers/mmc/host/mmci.h | 4 ++++ 3 files changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/mmci.txt b/Documentation/devicetree/bindings/mmc/mmci.txt index 03796cf..e952707 100644 --- a/Documentation/devicetree/bindings/mmc/mmci.txt +++ b/Documentation/devicetree/bindings/mmc/mmci.txt @@ -11,6 +11,8 @@ Required properties: - compatible : contains "arm,pl18x", "arm,primecell". - vmmc-supply : phandle to the regulator device tree node, mentioned as the VCC/VDD supply in the eMMC/SD specs. +depend of variant: +- resets : phandle to internal reset line. Optional properties: - arm,primecell-periphid : contains the PrimeCell Peripheral ID, it overrides diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 9c00804..87724e1 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -37,6 +37,7 @@ #include #include #include +#include #include #include @@ -1445,6 +1446,14 @@ static int mmci_probe(struct amba_device *dev, dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max); + if (variant->reset) { + host->rst = devm_reset_control_get_exclusive(&dev->dev, NULL); + if (IS_ERR(host->rst)) { + ret = PTR_ERR(host->rst); + goto clk_disable; + } + } + /* Get regulators and the supported OCR mask */ ret = mmc_regulator_get_supply(mmc); if (ret) diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index 30d3f53..2d7e901 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -284,6 +284,7 @@ struct mmci_host; * register. * @opendrain: bitmask identifying the OPENDRAIN bit inside MMCIPOWER register * @mmci_dma: Pointer to platform-specific DMA callbacks. + * @reset: true if variant has need reset signal. * @validate_data: if hardware block has specific constraint on validate data * @set_clk_ios: if clock procedure of variant is specific * @set_pwr_ios: if power procedure of variant is specific @@ -329,6 +330,7 @@ struct variant_data { u32 start_err; u32 opendrain; struct mmci_dma_ops *mmci_dma; + bool reset; int (*validate_data)(struct mmci_host *host, struct mmc_data *data); void (*set_clkreg)(struct mmci_host *host, unsigned int desired); void (*set_pwrreg)(struct mmci_host *host, unsigned char power_mode, @@ -345,6 +347,8 @@ struct mmci_host { struct clk *clk; bool singleirq; + struct reset_control *rst; + spinlock_t lock; unsigned int mclk;