From patchwork Tue Jul 17 09:56:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ludovic BARRE X-Patchwork-Id: 10528779 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4297B600D0 for ; Tue, 17 Jul 2018 09:58:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 470DC27F92 for ; Tue, 17 Jul 2018 09:58:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3B5C828BA1; Tue, 17 Jul 2018 09:58:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D48AA27F92 for ; Tue, 17 Jul 2018 09:58:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=sv0514Agl6f7F4/5DF74eUyuEMY5cTY4cZq72+6mryM=; b=bpek2EJmHC/BM4 eysFt3gkPm8k3p3XgflpTui6WNc2r5YObP4AC6JlKQMX5TcP3s9Hs6jNThW3RtNV6K6t/fD1XgkwP CLJQ+6klO3/iuE8Jcrxcx6Y/Lg5onuwOtd+aFbKSYR4YJIeTb+EPX9JQRKNhcZISl1b4vUl86Y829 QCZkTDSDCTgG4NRAqOwelOeil38VOG/fkfnPgLCTu0T6cS9WpQgl7h0EjDm/Jr50URONUJVmYplZO FL0EBdksfpwSahRfIivwxHp3O11usnhrC0PGazBt2s29WRAg0R762PiHGar6sfP4GwP6DwqmSydqF 8GQo6ubExjNuvMZjoSCA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1ffMkQ-0000gC-Cy; Tue, 17 Jul 2018 09:58:22 +0000 Received: from mx07-00178001.pphosted.com ([62.209.51.94]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1ffMiu-0006x1-60 for linux-arm-kernel@lists.infradead.org; Tue, 17 Jul 2018 09:56:55 +0000 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w6H9s4XL006655; Tue, 17 Jul 2018 11:56:34 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2k87ueg3j1-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 17 Jul 2018 11:56:34 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4C17331; Tue, 17 Jul 2018 09:56:34 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2DA5D4E03; Tue, 17 Jul 2018 09:56:34 +0000 (GMT) Received: from SAFEX1HUBCAS24.st.com (10.75.90.95) by SAFEX1HUBCAS21.st.com (10.75.90.44) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 17 Jul 2018 11:56:33 +0200 Received: from lmecxl0923.lme.st.com (10.48.0.237) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 17 Jul 2018 11:56:33 +0200 From: Ludovic Barre To: Linus Walleij Subject: [PATCH 2/2] pinctrl: stm32: add syscfg mask parameter Date: Tue, 17 Jul 2018 11:56:27 +0200 Message-ID: <1531821387-29845-3-git-send-email-ludovic.Barre@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1531821387-29845-1-git-send-email-ludovic.Barre@st.com> References: <1531821387-29845-1-git-send-email-ludovic.Barre@st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.0.237] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-07-17_02:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180717_025649_010712_86E5DFC3 X-CRM114-Status: GOOD ( 13.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexandre Torgue , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Ludovic Barre , Maxime Coquelin , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ludovic Barre This patch adds mask parameter to define IRQ mux field. This field could vary depend of IRQ mux selection register. To avoid backward compatibility, the drivers set the legacy value by default. Signed-off-by: Ludovic Barre Acked-by: Alexandre TORGUE --- drivers/pinctrl/stm32/pinctrl-stm32.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c index dfed609..f756232 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32.c +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c @@ -46,6 +46,8 @@ #define STM32_GPIO_PINS_PER_BANK 16 #define STM32_GPIO_IRQ_LINE 16 +#define SYSCFG_IRQMUX_MASK GENMASK(3, 0) + #define gpio_range_to_bank(chip) \ container_of(chip, struct stm32_gpio_bank, range) @@ -1033,6 +1035,7 @@ static int stm32_pctrl_dt_setup_irq(struct platform_device *pdev, struct device *dev = &pdev->dev; struct regmap *rm; int offset, ret, i; + int mask, mask_width; parent = of_irq_find_parent(np); if (!parent) @@ -1052,12 +1055,21 @@ static int stm32_pctrl_dt_setup_irq(struct platform_device *pdev, if (ret) return ret; + ret = of_property_read_u32_index(np, "st,syscfg", 2, &mask); + if (ret) + mask = SYSCFG_IRQMUX_MASK; + + mask_width = fls(mask); + for (i = 0; i < STM32_GPIO_PINS_PER_BANK; i++) { struct reg_field mux; mux.reg = offset + (i / 4) * 4; - mux.lsb = (i % 4) * 4; - mux.msb = mux.lsb + 3; + mux.lsb = (i % 4) * mask_width; + mux.msb = mux.lsb + mask_width - 1; + + dev_dbg(dev, "irqmux%d: reg:%#x, lsb:%d, msb:%d\n", + i, mux.reg, mux.lsb, mux.msb); pctl->irqmux[i] = devm_regmap_field_alloc(dev, rm, mux); if (IS_ERR(pctl->irqmux[i]))