[07/12] asm-generic/tlb: Guard with #ifdef CONFIG_MMU

Message ID	1535645747-9823-8-git-send-email-will.deacon@arm.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org> From: Will Deacon <will.deacon@arm.com> To: linux-kernel@vger.kernel.org Subject: [PATCH 07/12] asm-generic/tlb: Guard with #ifdef CONFIG_MMU Date: Thu, 30 Aug 2018 17:15:41 +0100 Message-Id: <1535645747-9823-8-git-send-email-will.deacon@arm.com> In-Reply-To: <1535645747-9823-1-git-send-email-will.deacon@arm.com> References: <1535645747-9823-1-git-send-email-will.deacon@arm.com> Precedence: list Cc: benh@au1.ibm.com, peterz@infradead.org, catalin.marinas@arm.com, Will Deacon <will.deacon@arm.com>, npiggin@gmail.com, torvalds@linux-foundation.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org
Series	Avoid synchronous TLB invalidation for intermediate page-table entries on arm64 \| expand [00/12] Avoid synchronous TLB invalidation for intermediate page-table entries on arm64 [01/12] arm64: tlb: Use last-level invalidation in flush_tlb_kernel_range() [02/12] arm64: tlb: Add DSB ISHST prior to TLBI in __flush_tlb_[kernel_]pgtable() [03/12] arm64: pgtable: Implement p[mu]d_valid() and check in set_p[mu]d() [04/12] arm64: tlb: Justify non-leaf invalidation in flush_tlb_range() [05/12] arm64: tlbflush: Allow stride to be specified for __flush_tlb_range() [06/12] arm64: tlb: Remove redundant !CONFIG_HAVE_RCU_TABLE_FREE code [07/12] asm-generic/tlb: Guard with #ifdef CONFIG_MMU [08/12] asm-generic/tlb: Track freeing of page-table directories in struct mmu_gather [09/12] asm-generic/tlb: Track which levels of the page tables have been cleared [10/12] arm64: tlb: Adjust stride and type of TLBI according to mmu_gather [11/12] arm64: tlb: Avoid synchronous TLBIs when freeing page tables [12/12] arm64: tlb: Rewrite stale comment in asm/tlbflush.h

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1535645747-9823-8-git-send-email-will.deacon@arm.com (mailing list archive)

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Headers

From: Will Deacon <will.deacon@arm.com>
To: linux-kernel@vger.kernel.org
Subject: [PATCH 07/12] asm-generic/tlb: Guard with #ifdef CONFIG_MMU
Date: Thu, 30 Aug 2018 17:15:41 +0100
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 Will Deacon <will.deacon@arm.com>, npiggin@gmail.com,
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Series

Avoid synchronous TLB invalidation for intermediate page-table entries on arm64 | expand

Commit Message

Will Deacon Aug. 30, 2018, 4:15 p.m. UTC

The inner workings of the mmu_gather-based TLB invalidation mechanism
are not relevant to nommu configurations, so guard them with an #ifdef.
This allows us to implement future functions using static inlines
without breaking the build.

Signed-off-by: Will Deacon <will.deacon@arm.com>
---
 include/asm-generic/tlb.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h
index b3353e21f3b3..a25e236f7a7f 100644
--- a/include/asm-generic/tlb.h
+++ b/include/asm-generic/tlb.h
@@ -20,6 +20,8 @@ 
 #include <asm/pgalloc.h>
 #include <asm/tlbflush.h>
 
+#ifdef CONFIG_MMU
+
 #ifdef CONFIG_HAVE_RCU_TABLE_FREE
 /*
  * Semi RCU freeing of the page directories.
@@ -310,6 +312,8 @@  static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb,
 #endif
 #endif
 
+#endif /* CONFIG_MMU */
+
 #define tlb_migrate_finish(mm) do {} while (0)
 
 #endif /* _ASM_GENERIC__TLB_H */

[07/12] asm-generic/tlb: Guard with #ifdef CONFIG_MMU

Commit Message

Patch