From patchwork Tue Sep 11 07:26:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Yves MORDRET X-Patchwork-Id: 10595183 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1740D1575 for ; Tue, 11 Sep 2018 07:28:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F1F0F2925D for ; Tue, 11 Sep 2018 07:28:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E5C4429263; Tue, 11 Sep 2018 07:28:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7B6932925D for ; Tue, 11 Sep 2018 07:28:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=EyZBjZ/kdq8Di2btv6lMC2cJGYFw4XZ/Mila3HH9aeA=; b=h/Fy1g7nLmwjx0 J8b/rOoThi27aHDGDaWveRbjRpNGLUFftD3TQqEwy9WsroAqUVA8Yv70p9+Htk85+DenKnD4l47si sxQ2TasScAkLlJz08/55mlsRAGE0ChrgmoDaGdy7gPcAIQZ0a66K0c3aFVLRndCc/LfFJg1EiSHFJ fnvB0lf+Rz1PvEqpx/xMnwzP+n8jsPPaMBqWFMf9r1hanOZt7Ho3tLpVt9oyo6vlS9ETuozQPZiyK ZUP/7t2j6jk9Apb/7Bf30rDHH9tBVpdTheeVVNZCN3wu+U4GK2CDO3Tu8wqmDMYIzonimMuGK63eW 1dYpMAszbRTl5S+qs1iQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fzd61-0007uA-IF; Tue, 11 Sep 2018 07:28:25 +0000 Received: from mx07-00178001.pphosted.com ([62.209.51.94]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fzd55-0007QC-Uc for linux-arm-kernel@lists.infradead.org; Tue, 11 Sep 2018 07:27:32 +0000 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w8B7OVEh032029; Tue, 11 Sep 2018 09:27:07 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2me96f825p-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 11 Sep 2018 09:27:07 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id CE5733F; Tue, 11 Sep 2018 07:27:06 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node2.st.com [10.75.127.14]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A15801E3B; Tue, 11 Sep 2018 07:27:06 +0000 (GMT) Received: from localhost (10.75.127.46) by SFHDAG5NODE2.st.com (10.75.127.14) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 11 Sep 2018 09:27:06 +0200 From: Pierre-Yves MORDRET To: Vinod Koul , Rob Herring , Mark Rutland , Alexandre Torgue , Maxime Coquelin , Dan Williams , , , , Subject: [PATCH v1 3/7] dt-bindings: stm32-mdma: Add DMA/MDMA chaining support bindings Date: Tue, 11 Sep 2018 09:26:56 +0200 Message-ID: <1536650820-16076-4-git-send-email-pierre-yves.mordret@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536650820-16076-1-git-send-email-pierre-yves.mordret@st.com> References: <1536650820-16076-1-git-send-email-pierre-yves.mordret@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG5NODE1.st.com (10.75.127.13) To SFHDAG5NODE2.st.com (10.75.127.14) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-09-11_03:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180911_002728_295541_4D527AD4 X-CRM114-Status: GOOD ( 13.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Pierre-Yves MORDRET Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the description of the 2 properties needed to support M2M transfer triggered by STM32 DMA when his transfer is complete. Signed-off-by: Pierre-Yves MORDRET --- Version history: v1: * Initial --- --- .../devicetree/bindings/dma/stm32-mdma.txt | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/stm32-mdma.txt b/Documentation/devicetree/bindings/dma/stm32-mdma.txt index d18772d..1810f87 100644 --- a/Documentation/devicetree/bindings/dma/stm32-mdma.txt +++ b/Documentation/devicetree/bindings/dma/stm32-mdma.txt @@ -10,7 +10,7 @@ Required properties: - interrupts: Should contain the MDMA interrupt. - clocks: Should contain the input clock of the DMA instance. - resets: Reference to a reset controller asserting the DMA controller. -- #dma-cells : Must be <5>. See DMA client paragraph for more details. +- #dma-cells : Must be <6>. See DMA client paragraph for more details. Optional properties: - dma-channels: Number of DMA channels supported by the controller. @@ -26,7 +26,7 @@ Example: interrupts = <122>; clocks = <&timer_clk>; resets = <&rcc 992>; - #dma-cells = <5>; + #dma-cells = <6>; dma-channels = <16>; dma-requests = <32>; st,ahb-addr-masks = <0x20000000>, <0x00000000>; @@ -35,8 +35,8 @@ Example: * DMA client DMA clients connected to the STM32 MDMA controller must use the format -described in the dma.txt file, using a five-cell specifier for each channel: -a phandle to the MDMA controller plus the following five integer cells: +described in the dma.txt file, using a six-cell specifier for each channel: +a phandle to the MDMA controller plus the following six integer cells: 1. The request line number 2. The priority level @@ -76,19 +76,23 @@ a phandle to the MDMA controller plus the following five integer cells: if no HW ack signal is used by the MDMA client 5. A 32bit mask specifying the value to be written to acknowledge the request if no HW ack signal is used by the MDMA client +6. A bitfield value specifying if the MDMA client wants to generate M2M + transfer with HW trigger (1) or not (0). This bitfield should be only + enabled for M2M transfer triggered by STM32 DMA client. The memory devices + involved in this kind of transfer are SRAM and DDR. Example: i2c4: i2c@5c002000 { compatible = "st,stm32f7-i2c"; reg = <0x5c002000 0x400>; - interrupts = <95>, - <96>; - clocks = <&timer_clk>; + interrupts = , + ; + clocks = <&clk_hsi>; #address-cells = <1>; #size-cells = <0>; - dmas = <&mdma1 36 0x0 0x40008 0x0 0x0>, - <&mdma1 37 0x0 0x40002 0x0 0x0>; + dmas = <&mdma1 36 0x0 0x40008 0x0 0x0 0>, + <&mdma1 37 0x0 0x40002 0x0 0x0 0>; dma-names = "rx", "tx"; status = "disabled"; };