From patchwork Wed Nov 7 12:38:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 10672283 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A4FD915E9 for ; Wed, 7 Nov 2018 12:39:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8FD472B2B5 for ; Wed, 7 Nov 2018 12:39:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 832422B2BA; Wed, 7 Nov 2018 12:39:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D39102B295 for ; Wed, 7 Nov 2018 12:39:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Q+AxFtWsaek/7kXQpn6vxlpUYM9WRIVxXwaDf4EBKE4=; b=YHp6yIOYe09sPK dGEB2uvsjRmaClkF350dzT1zX1/P6miEcj5BjQH0E0EDoetDgMwBIQjjEi4IVgRItMoz8sWbLnsjH Jv0WONvGvIE+/padqbi+Pkj069PUzDCoroqD7My3Ay4+D2RZJtEwgydO1W61DUFMRAb5nkigGxvvY vqyotNYSbwyDdFXDV7gdOm+QCIlPKxsBJJuZQEN9z03LxFcKHra6Q6d1RBFHVU/Zw1i5MpmDwl43z hDP+DTNgQB+lv4H4FWbFDD9NSZw5IOuZNn5di/BITul6ltDS9j6WTIFWTsOUc/6ySmp8Rh0N2UAOg XvOfa5l8lP4zB3ZDeQuQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gKN73-0004Ru-Me; Wed, 07 Nov 2018 12:39:13 +0000 Received: from mail-ve1eur02on0602.outbound.protection.outlook.com ([2a01:111:f400:fe06::602] helo=EUR02-VE1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gKN6a-0003cc-Rq for linux-arm-kernel@lists.infradead.org; Wed, 07 Nov 2018 12:38:46 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=HwnztoQH1KrtAgE2pm8PGQog3cKpXNUfx9Vua0NEWkk=; b=RDJIfKoQ70pUZA7RghPjjZz8Qo2+752VOe6VbppDF3yq0Tb9V2p0IsY+k8/DYFZhqI0/0EeGndKU1ECEKe0bW+ySI5XeiWy/ew2sj2NXrTlMfkglTGlEx8F4413WJazsOE6gpSolrrr4+B9WCvg72QxV9RGZkoAiq8g4tzKDoMo= Received: from AM6PR0402MB3654.eurprd04.prod.outlook.com (52.133.28.145) by AM6PR0402MB3461.eurprd04.prod.outlook.com (52.133.19.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.23; Wed, 7 Nov 2018 12:38:09 +0000 Received: from AM6PR0402MB3654.eurprd04.prod.outlook.com ([fe80::5195:5e4c:be83:408b]) by AM6PR0402MB3654.eurprd04.prod.outlook.com ([fe80::5195:5e4c:be83:408b%4]) with mapi id 15.20.1294.034; Wed, 7 Nov 2018 12:38:09 +0000 From: Abel Vesa To: Sascha Hauer , Lucas Stach , "A.s. Dong" Subject: [PATCH v12 4/5] clk: imx: Add imx composite clock Thread-Topic: [PATCH v12 4/5] clk: imx: Add imx composite clock Thread-Index: AQHUdpa9dT6KaqJjRky/YmugSbvrGQ== Date: Wed, 7 Nov 2018 12:38:09 +0000 Message-ID: <1541594266-16712-5-git-send-email-abel.vesa@nxp.com> References: <1541594266-16712-1-git-send-email-abel.vesa@nxp.com> In-Reply-To: <1541594266-16712-1-git-send-email-abel.vesa@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM6PR06CA0009.eurprd06.prod.outlook.com (2603:10a6:20b:14::22) To AM6PR0402MB3654.eurprd04.prod.outlook.com (2603:10a6:209:19::17) x-originating-ip: [95.76.156.53] authentication-results: spf=none (sender IP is ) smtp.mailfrom=abel.vesa@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; AM6PR0402MB3461; 6:c7lqA+fowiZ5ItKDQVkIg4g7q3JPUswUfWmVJeSQlVu8hk+s61JVPh2274aEt/vfFmib1JDM75N4LN+b/WBJ0xuESDJj7AjxTBxUsj41/+cQQSzSt9LhXD3DwpWDDbpDjQWWoRv1BdSkx1L4DNKhQ4e+mxYA3XkfOtMtGOWfKCYx3ZN9xObqfiQeKF8cITZF0I1m5zaXpaCK3/tuhVKROqo5/It2+J64Oi2OffECoiaFJEfSdBBNpmDa/rrWlpd0UtGcVOjLdutXvVIltRrKqlqmLkqHmxqp1Z/DiH/AizhGyTDiYrQ8w7y8lYRpf6pCnbsF/vX/h2WtYq0ttTQk6yujMKkE3Xi2iutZq1tNrkcOUp3myNr7fYUFQHy7R70pRTwf2PvSj0UeQDqeC872F9u4eWWanKgIHaYS2zG7quGK9XJlVbMsiodRaqEnRwB4Rt3+Hs/cCC6MIhmkE7DPTA==; 5:f4G8UvMHaFw0sajEAm+mX1oAS8b7t4Xl48e8uilYfA0FmueUjZi6UhzCekPEuTHrkFYHCILSAv9/unJOyXknauukIbe3H9zDWt4cO7An92is1Vn5F0BBZKD+Xidlwc5qhhFZYCJXRH6S+UBMsGUUkD4nSdaeBAdPP0un5LvwBD0=; 7:yM3pY1wDSvKh/LSXEHRl9HtsrvGXgaZbpo3t2XsuOxqkAWSXTSvCC2V7bcWJSOBW7wpNJeL+rw0GKf/sr1Okk+NXpMDMtuIqqlR89aaRPYMara2DWxGFSo/fFdIKigZA1+msQdF8hF5zQAudSdfDPg== x-ms-office365-filtering-correlation-id: bde25103-d4cc-499f-4f74-08d644addf9f x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(7020095)(4652040)(8989299)(5600074)(711020)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7153060)(7193020); SRVR:AM6PR0402MB3461; x-ms-traffictypediagnostic: AM6PR0402MB3461: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0; PCL:0; RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(93006095)(93001095)(10201501046)(3002001)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123558120)(20161123564045)(20161123562045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095); SRVR:AM6PR0402MB3461; BCL:0; PCL:0; RULEID:; SRVR:AM6PR0402MB3461; x-forefront-prvs: 08497C3D99 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(366004)(346002)(376002)(396003)(136003)(39860400002)(199004)(189003)(8936002)(26005)(2906002)(6512007)(446003)(53936002)(7736002)(2616005)(11346002)(478600001)(476003)(305945005)(110136005)(71200400001)(81166006)(86362001)(6436002)(575784001)(14454004)(316002)(486006)(6486002)(71190400001)(81156014)(8676002)(6636002)(44832011)(186003)(105586002)(106356001)(99286004)(54906003)(36756003)(25786009)(4326008)(97736004)(52116002)(3846002)(6116002)(5660300001)(68736007)(14444005)(66066001)(7416002)(256004)(6506007)(2900100001)(76176011)(102836004)(386003); DIR:OUT; SFP:1101; SCL:1; SRVR:AM6PR0402MB3461; H:AM6PR0402MB3654.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:3; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: cZfrY6avlhKGdIthd8JmJOsRTyNy/K5kE9kJU/Cz81wnwq/hnd1A1R+zcj7nFsJWUweo57LZbUKjYahuJefNJXkdiqQ7uBhoG66eSJTvzuYYt6ZqnazCiq75WpE+xdMfjvRxLeOnyMcOobLW4JbSdhkVCpLIltH02DgWlFPzwUe36HRNehXpROGdzO8qstiTqnvHn2vv5q+mM4bRV9CGQ3V1wqaFOI4nAGOWy7K0mg6bD3ZooffBEl1G872MnpShlTlg6oMOKFOpKaVnd4uFnATN9Ja/14QClEwf3rTNQG7QGZ+gduTHnrQhDH71a/qGBs/AU87YoXwwM5zv5Zr2avXIJgrrujxSiaY6go1AGXg= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: bde25103-d4cc-499f-4f74-08d644addf9f X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Nov 2018 12:38:09.4266 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR0402MB3461 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181107_043844_933031_FE39A427 X-CRM114-Status: GOOD ( 19.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Rob Herring , Abel Vesa , "devicetree@vger.kernel.org" , Stephen Boyd , Michael Turquette , "linux-kernel@vger.kernel.org" , Abel Vesa , dl-linux-imx , Fabio Estevam , Shawn Guo , "linux-clk@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Since a lot of clocks on imx8m are formed by a mux, gate, predivider and divider, the idea here is to combine all of those into one composite clock, but we need to deal with both predivider and divider at the same time and therefore we add the imx8m_clk_composite_divider_ops and register the composite clock with those. Signed-off-by: Abel Vesa Suggested-by: Sascha Hauer Reviewed-by: Sascha Hauer --- drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-composite-8m.c | 178 +++++++++++++++++++++++++++++++++++++ drivers/clk/imx/clk.h | 16 ++++ 3 files changed, 195 insertions(+) create mode 100644 drivers/clk/imx/clk-composite-8m.c diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile index b87513c..237444b 100644 --- a/drivers/clk/imx/Makefile +++ b/drivers/clk/imx/Makefile @@ -3,6 +3,7 @@ obj-y += \ clk.o \ clk-busy.o \ + clk-composite-8m.o \ clk-cpu.o \ clk-fixup-div.o \ clk-fixup-mux.o \ diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c new file mode 100644 index 0000000..bcd31d8 --- /dev/null +++ b/drivers/clk/imx/clk-composite-8m.c @@ -0,0 +1,178 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2018 NXP + */ + +#include +#include +#include + +#include "clk.h" + +#define PCG_PREDIV_SHIFT 16 +#define PCG_PREDIV_WIDTH 3 +#define PCG_PREDIV_MAX 8 + +#define PCG_DIV_SHIFT 0 +#define PCG_DIV_WIDTH 6 +#define PCG_DIV_MAX 64 + +#define PCG_PCS_SHIFT 24 +#define PCG_PCS_MASK 0x7 + +#define PCG_CGC_SHIFT 28 + +static unsigned long imx8m_clk_composite_divider_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_divider *divider = to_clk_divider(hw); + unsigned long prediv_rate; + unsigned int prediv_value; + unsigned int div_value; + + prediv_value = readl(divider->reg) >> divider->shift; + prediv_value &= clk_div_mask(divider->width); + + prediv_rate = divider_recalc_rate(hw, parent_rate, prediv_value, + NULL, divider->flags, + divider->width); + + div_value = readl(divider->reg) >> PCG_DIV_SHIFT; + div_value &= clk_div_mask(PCG_DIV_WIDTH); + + return divider_recalc_rate(hw, prediv_rate, div_value, NULL, + divider->flags, PCG_DIV_WIDTH); +} + +static int imx8m_clk_composite_compute_dividers(unsigned long rate, + unsigned long parent_rate, + int *prediv, int *postdiv) +{ + int div1, div2; + int error = INT_MAX; + int ret = -EINVAL; + + *prediv = 1; + *postdiv = 1; + + for (div1 = 1; div1 <= PCG_PREDIV_MAX; div1++) { + for (div2 = 1; div2 <= PCG_DIV_MAX; div2++) { + int new_error = ((parent_rate / div1) / div2) - rate; + + if (abs(new_error) < abs(error)) { + *prediv = div1; + *postdiv = div2; + error = new_error; + ret = 0; + } + } + } + return ret; +} + +static long imx8m_clk_composite_divider_round_rate(struct clk_hw *hw, + unsigned long rate, + unsigned long *prate) +{ + int prediv_value; + int div_value; + + imx8m_clk_composite_compute_dividers(rate, *prate, + &prediv_value, &div_value); + rate = DIV_ROUND_UP(*prate, prediv_value); + + return DIV_ROUND_UP(rate, div_value); + +} + +static int imx8m_clk_composite_divider_set_rate(struct clk_hw *hw, + unsigned long rate, + unsigned long parent_rate) +{ + struct clk_divider *divider = to_clk_divider(hw); + unsigned long flags = 0; + int prediv_value; + int div_value; + int ret = 0; + u32 val; + + ret = imx8m_clk_composite_compute_dividers(rate, parent_rate, + &prediv_value, &div_value); + if (ret) + return -EINVAL; + + spin_lock_irqsave(divider->lock, flags); + + val = readl(divider->reg); + val &= ~((clk_div_mask(divider->width) << divider->shift) | + (clk_div_mask(PCG_DIV_WIDTH) << PCG_DIV_SHIFT)); + + val |= (u32)(prediv_value - 1) << divider->shift; + val |= (u32)(div_value - 1) << PCG_DIV_SHIFT; + writel(val, divider->reg); + + spin_unlock_irqrestore(divider->lock, flags); + + return ret; +} + +static const struct clk_ops imx8m_clk_composite_divider_ops = { + .recalc_rate = imx8m_clk_composite_divider_recalc_rate, + .round_rate = imx8m_clk_composite_divider_round_rate, + .set_rate = imx8m_clk_composite_divider_set_rate, +}; + +struct clk *imx8m_clk_composite_flags(const char *name, + const char **parent_names, + int num_parents, void __iomem *reg, + unsigned long flags) +{ + struct clk_hw *hw = NULL, *mux_hw = NULL; + struct clk_hw *div_hw = NULL, *gate_hw = NULL; + struct clk_divider *div = NULL; + struct clk_gate *gate = NULL; + struct clk_mux *mux = NULL; + + mux = kzalloc(sizeof(*mux), GFP_KERNEL); + if (!mux) + goto fail; + + mux_hw = &mux->hw; + mux->reg = reg; + mux->shift = PCG_PCS_SHIFT; + mux->mask = PCG_PCS_MASK; + + div = kzalloc(sizeof(*div), GFP_KERNEL); + if (!div) + goto fail; + + div_hw = &div->hw; + div->reg = reg; + div->shift = PCG_PREDIV_SHIFT; + div->width = PCG_PREDIV_WIDTH; + div->lock = &imx_ccm_lock; + div->flags = CLK_DIVIDER_ROUND_CLOSEST; + + gate = kzalloc(sizeof(*gate), GFP_KERNEL); + if (!gate) + goto fail; + + gate_hw = &gate->hw; + gate->reg = reg; + gate->bit_idx = PCG_CGC_SHIFT; + + hw = clk_hw_register_composite(NULL, name, parent_names, num_parents, + mux_hw, &clk_mux_ops, div_hw, + &imx8m_clk_composite_divider_ops, + gate_hw, &clk_gate_ops, flags); + if (IS_ERR(hw)) + goto fail; + + return hw->clk; + +fail: + kfree(gate); + kfree(div); + kfree(mux); + return ERR_CAST(hw); +} diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index 864cd8a..cb3e92c 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -239,4 +239,20 @@ struct clk *imx_clk_cpu(const char *name, const char *parent_name, struct clk *div, struct clk *mux, struct clk *pll, struct clk *step); +struct clk *imx8m_clk_composite_flags(const char *name, + const char **parent_names, + int num_parents, void __iomem *reg, + unsigned long flags); + +#define __imx8m_clk_composite(name, parent_names, reg, flags) \ + imx8m_clk_composite_flags(name, parent_names, \ + ARRAY_SIZE(parent_names), reg, \ + flags | CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE) + +#define imx8m_clk_composite(name, parent_names, reg) \ + __imx8m_clk_composite(name, parent_names, reg, 0) + +#define imx8m_clk_composite_critical(name, parent_names, reg) \ + __imx8m_clk_composite(name, parent_names, reg, CLK_IS_CRITICAL) + #endif