| Message ID | 1542723322-42536-2-git-send-email-andrew.murray@arm.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm64: Support perf event modifiers :G and :H | expand |
On Tue, Nov 20, 2018 at 02:15:19PM +0000, Andrew Murray wrote: > The armv8pmu_enable_event_counter function issues an isb instruction > after enabling a pair of counters - this doesn't provide any value > and is inconsistent with the armv8pmu_disable_event_counter. > > In any case armv8pmu_enable_event_counter is always called with the > PMU stopped. Starting the PMU with armv8pmu_start results in an isb > instruction being issued. > > Let's remove the unnecessary isb instruction. > > Signed-off-by: Andrew Murray <andrew.murray@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> ... though it would be nice to explicitly point out that the ISB in armv8pmu_start() is before the write to PMCR_EL1, if you happen to respin this patch. Mark. > --- > arch/arm64/kernel/perf_event.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c > index 8e38d52..de564ae 100644 > --- a/arch/arm64/kernel/perf_event.c > +++ b/arch/arm64/kernel/perf_event.c > @@ -652,7 +652,6 @@ static inline void armv8pmu_enable_event_counter(struct perf_event *event) > armv8pmu_enable_counter(idx); > if (armv8pmu_event_is_chained(event)) > armv8pmu_enable_counter(idx - 1); > - isb(); > } > > static inline int armv8pmu_disable_counter(int idx) > -- > 2.7.4 >
On Wed, Nov 21, 2018 at 03:58:14PM +0000, Mark Rutland wrote: > On Tue, Nov 20, 2018 at 02:15:19PM +0000, Andrew Murray wrote: > > The armv8pmu_enable_event_counter function issues an isb instruction > > after enabling a pair of counters - this doesn't provide any value > > and is inconsistent with the armv8pmu_disable_event_counter. > > > > In any case armv8pmu_enable_event_counter is always called with the > > PMU stopped. Starting the PMU with armv8pmu_start results in an isb > > instruction being issued. > > > > Let's remove the unnecessary isb instruction. > > > > Signed-off-by: Andrew Murray <andrew.murray@arm.com> > > Acked-by: Mark Rutland <mark.rutland@arm.com> > > ... though it would be nice to explicitly point out that the ISB in > armv8pmu_start() is before the write to PMCR_EL1, if you happen to > respin this patch. Thanks, I'm respining so I'll update the log and preserve your ack. Andrew Murray > > Mark. > > > --- > > arch/arm64/kernel/perf_event.c | 1 - > > 1 file changed, 1 deletion(-) > > > > diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c > > index 8e38d52..de564ae 100644 > > --- a/arch/arm64/kernel/perf_event.c > > +++ b/arch/arm64/kernel/perf_event.c > > @@ -652,7 +652,6 @@ static inline void armv8pmu_enable_event_counter(struct perf_event *event) > > armv8pmu_enable_counter(idx); > > if (armv8pmu_event_is_chained(event)) > > armv8pmu_enable_counter(idx - 1); > > - isb(); > > } > > > > static inline int armv8pmu_disable_counter(int idx) > > -- > > 2.7.4 > >
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index 8e38d52..de564ae 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -652,7 +652,6 @@ static inline void armv8pmu_enable_event_counter(struct perf_event *event) armv8pmu_enable_counter(idx); if (armv8pmu_event_is_chained(event)) armv8pmu_enable_counter(idx - 1); - isb(); } static inline int armv8pmu_disable_counter(int idx)
The armv8pmu_enable_event_counter function issues an isb instruction after enabling a pair of counters - this doesn't provide any value and is inconsistent with the armv8pmu_disable_event_counter. In any case armv8pmu_enable_event_counter is always called with the PMU stopped. Starting the PMU with armv8pmu_start results in an isb instruction being issued. Let's remove the unnecessary isb instruction. Signed-off-by: Andrew Murray <andrew.murray@arm.com> --- arch/arm64/kernel/perf_event.c | 1 - 1 file changed, 1 deletion(-)