Message ID | 1544258371-4600-3-git-send-email-yong.wu@mediatek.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | MT8183 IOMMU SUPPORT | expand |
On 08/12/2018 09:39, Yong Wu wrote: > Use a struct as the platform special data instead of the enumeration. > This is a prepare patch for adding mt8183 iommu support. > > Signed-off-by: Yong Wu <yong.wu@mediatek.com> > --- Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> > drivers/iommu/mtk_iommu.c | 24 ++++++++++++++++-------- > drivers/iommu/mtk_iommu.h | 6 +++++- > 2 files changed, 21 insertions(+), 9 deletions(-) > > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c > index 44bd5b9..9a2225b 100644 > --- a/drivers/iommu/mtk_iommu.c > +++ b/drivers/iommu/mtk_iommu.c > @@ -54,7 +54,7 @@ > #define REG_MMU_CTRL_REG 0x110 > #define F_MMU_PREFETCH_RT_REPLACE_MOD BIT(4) > #define F_MMU_TF_PROTECT_SEL_SHIFT(data) \ > - ((data)->m4u_plat == M4U_MT2712 ? 4 : 5) > + ((data)->plat_data->m4u_plat == M4U_MT2712 ? 4 : 5) > /* It's named by F_MMU_TF_PROT_SEL in mt2712. */ > #define F_MMU_TF_PROTECT_SEL(prot, data) \ > (((prot) & 0x3) << F_MMU_TF_PROTECT_SEL_SHIFT(data)) > @@ -517,7 +517,7 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data) > } > > regval = F_MMU_TF_PROTECT_SEL(2, data); > - if (data->m4u_plat == M4U_MT8173) > + if (data->plat_data->m4u_plat == M4U_MT8173) > regval |= F_MMU_PREFETCH_RT_REPLACE_MOD; > writel_relaxed(regval, data->base + REG_MMU_CTRL_REG); > > @@ -538,14 +538,14 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data) > F_INT_PRETETCH_TRANSATION_FIFO_FAULT; > writel_relaxed(regval, data->base + REG_MMU_INT_MAIN_CONTROL); > > - if (data->m4u_plat == M4U_MT8173) > + if (data->plat_data->m4u_plat == M4U_MT8173) > regval = (data->protect_base >> 1) | (data->enable_4GB << 31); > else > regval = lower_32_bits(data->protect_base) | > upper_32_bits(data->protect_base); > writel_relaxed(regval, data->base + REG_MMU_IVRP_PADDR); > > - if (data->enable_4GB && data->m4u_plat != M4U_MT8173) { > + if (data->enable_4GB && data->plat_data->m4u_plat != M4U_MT8173) { > /* > * If 4GB mode is enabled, the validate PA range is from > * 0x1_0000_0000 to 0x1_ffff_ffff. here record bit[32:30]. > @@ -556,7 +556,7 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data) > writel_relaxed(0, data->base + REG_MMU_DCM_DIS); > > /* It's MISC control register whose default value is ok except mt8173.*/ > - if (data->m4u_plat == M4U_MT8173) > + if (data->plat_data->m4u_plat == M4U_MT8173) > writel_relaxed(0, data->base + REG_MMU_STANDARD_AXI_MODE); > > if (devm_request_irq(data->dev, data->irq, mtk_iommu_isr, 0, > @@ -589,7 +589,7 @@ static int mtk_iommu_probe(struct platform_device *pdev) > if (!data) > return -ENOMEM; > data->dev = dev; > - data->m4u_plat = (enum mtk_iommu_plat)of_device_get_match_data(dev); > + data->plat_data = of_device_get_match_data(dev); > > /* Protect memory. HW will access here while translation fault.*/ > protect = devm_kzalloc(dev, MTK_PROTECT_PA_ALIGN * 2, GFP_KERNEL); > @@ -733,9 +733,17 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev) > SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(mtk_iommu_suspend, mtk_iommu_resume) > }; > > +static const struct mtk_iommu_plat_data mt2712_data = { > + .m4u_plat = M4U_MT2712, > +}; > + > +static const struct mtk_iommu_plat_data mt8173_data = { > + .m4u_plat = M4U_MT8173, > +}; > + > static const struct of_device_id mtk_iommu_of_ids[] = { > - { .compatible = "mediatek,mt2712-m4u", .data = (void *)M4U_MT2712}, > - { .compatible = "mediatek,mt8173-m4u", .data = (void *)M4U_MT8173}, > + { .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data}, > + { .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data}, > {} > }; > > diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h > index 778498b..333a0ef 100644 > --- a/drivers/iommu/mtk_iommu.h > +++ b/drivers/iommu/mtk_iommu.h > @@ -41,6 +41,10 @@ enum mtk_iommu_plat { > M4U_MT8173, > }; > > +struct mtk_iommu_plat_data { > + enum mtk_iommu_plat m4u_plat; > +}; > + > struct mtk_iommu_domain; > > struct mtk_iommu_data { > @@ -57,7 +61,7 @@ struct mtk_iommu_data { > bool tlb_flush_active; > > struct iommu_device iommu; > - enum mtk_iommu_plat m4u_plat; > + const struct mtk_iommu_plat_data *plat_data; > > struct list_head list; > }; >
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 44bd5b9..9a2225b 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -54,7 +54,7 @@ #define REG_MMU_CTRL_REG 0x110 #define F_MMU_PREFETCH_RT_REPLACE_MOD BIT(4) #define F_MMU_TF_PROTECT_SEL_SHIFT(data) \ - ((data)->m4u_plat == M4U_MT2712 ? 4 : 5) + ((data)->plat_data->m4u_plat == M4U_MT2712 ? 4 : 5) /* It's named by F_MMU_TF_PROT_SEL in mt2712. */ #define F_MMU_TF_PROTECT_SEL(prot, data) \ (((prot) & 0x3) << F_MMU_TF_PROTECT_SEL_SHIFT(data)) @@ -517,7 +517,7 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data) } regval = F_MMU_TF_PROTECT_SEL(2, data); - if (data->m4u_plat == M4U_MT8173) + if (data->plat_data->m4u_plat == M4U_MT8173) regval |= F_MMU_PREFETCH_RT_REPLACE_MOD; writel_relaxed(regval, data->base + REG_MMU_CTRL_REG); @@ -538,14 +538,14 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data) F_INT_PRETETCH_TRANSATION_FIFO_FAULT; writel_relaxed(regval, data->base + REG_MMU_INT_MAIN_CONTROL); - if (data->m4u_plat == M4U_MT8173) + if (data->plat_data->m4u_plat == M4U_MT8173) regval = (data->protect_base >> 1) | (data->enable_4GB << 31); else regval = lower_32_bits(data->protect_base) | upper_32_bits(data->protect_base); writel_relaxed(regval, data->base + REG_MMU_IVRP_PADDR); - if (data->enable_4GB && data->m4u_plat != M4U_MT8173) { + if (data->enable_4GB && data->plat_data->m4u_plat != M4U_MT8173) { /* * If 4GB mode is enabled, the validate PA range is from * 0x1_0000_0000 to 0x1_ffff_ffff. here record bit[32:30]. @@ -556,7 +556,7 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data) writel_relaxed(0, data->base + REG_MMU_DCM_DIS); /* It's MISC control register whose default value is ok except mt8173.*/ - if (data->m4u_plat == M4U_MT8173) + if (data->plat_data->m4u_plat == M4U_MT8173) writel_relaxed(0, data->base + REG_MMU_STANDARD_AXI_MODE); if (devm_request_irq(data->dev, data->irq, mtk_iommu_isr, 0, @@ -589,7 +589,7 @@ static int mtk_iommu_probe(struct platform_device *pdev) if (!data) return -ENOMEM; data->dev = dev; - data->m4u_plat = (enum mtk_iommu_plat)of_device_get_match_data(dev); + data->plat_data = of_device_get_match_data(dev); /* Protect memory. HW will access here while translation fault.*/ protect = devm_kzalloc(dev, MTK_PROTECT_PA_ALIGN * 2, GFP_KERNEL); @@ -733,9 +733,17 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev) SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(mtk_iommu_suspend, mtk_iommu_resume) }; +static const struct mtk_iommu_plat_data mt2712_data = { + .m4u_plat = M4U_MT2712, +}; + +static const struct mtk_iommu_plat_data mt8173_data = { + .m4u_plat = M4U_MT8173, +}; + static const struct of_device_id mtk_iommu_of_ids[] = { - { .compatible = "mediatek,mt2712-m4u", .data = (void *)M4U_MT2712}, - { .compatible = "mediatek,mt8173-m4u", .data = (void *)M4U_MT8173}, + { .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data}, + { .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data}, {} }; diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h index 778498b..333a0ef 100644 --- a/drivers/iommu/mtk_iommu.h +++ b/drivers/iommu/mtk_iommu.h @@ -41,6 +41,10 @@ enum mtk_iommu_plat { M4U_MT8173, }; +struct mtk_iommu_plat_data { + enum mtk_iommu_plat m4u_plat; +}; + struct mtk_iommu_domain; struct mtk_iommu_data { @@ -57,7 +61,7 @@ struct mtk_iommu_data { bool tlb_flush_active; struct iommu_device iommu; - enum mtk_iommu_plat m4u_plat; + const struct mtk_iommu_plat_data *plat_data; struct list_head list; };
Use a struct as the platform special data instead of the enumeration. This is a prepare patch for adding mt8183 iommu support. Signed-off-by: Yong Wu <yong.wu@mediatek.com> --- drivers/iommu/mtk_iommu.c | 24 ++++++++++++++++-------- drivers/iommu/mtk_iommu.h | 6 +++++- 2 files changed, 21 insertions(+), 9 deletions(-)