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[118.155.13.174]) by smtp.gmail.com with ESMTPSA id r4sm50924003pgn.54.2018.12.20.12.50.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Dec 2018 12:50:08 -0800 (PST) From: Yoshihiro Kaneko To: linux-renesas-soc@vger.kernel.org Subject: [PATCH/RFT] arm64: dts: renesas: r8a77965: Create thermal zone to support IPA Date: Fri, 21 Dec 2018 05:49:41 +0900 Message-Id: <1545338982-19466-3-git-send-email-ykaneko0929@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1545338982-19466-1-git-send-email-ykaneko0929@gmail.com> References: <1545338982-19466-1-git-send-email-ykaneko0929@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181220_125020_473329_F6F8D998 X-CRM114-Status: GOOD ( 15.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Magnus Damm , Simon Horman , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Dien Pham Setup a thermal zone driven by SoC temperature sensor. Create passive trip points and bind them to CPUFreq cooling device that supports power extension. In R-Car Gen3, IPA is supportted for only one channel (on H3/M3/M3N board, it is channel THS3). Reason: Currently, IPA controls base on only CPU temperature. And only one thermal channel is assembled closest CPU cores is selected as target of IPA. If other channels are used, IPA controlling is not properly. Signed-off-by: Dien Pham Signed-off-by: An Huynh [takeshi.kihara.df: fix W=1 dtc unit_address_vs_reg warnings] Signed-off-by: Takeshi Kihara Signed-off-by: Yoshihiro Kaneko --- This patch is based on the devel branch of Simon Horman's renesas tree. arch/arm64/boot/dts/renesas/r8a77965.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index 6dc9b1f..a5bf342 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -111,6 +111,10 @@ power-domains = <&sysc R8A77965_PD_CA57_CPU0>; next-level-cache = <&L2_CA57>; enable-method = "psci"; + #cooling-cells = <2>; + dynamic-power-coefficient = <854>; + cooling-min-level = <0>; + cooling-max-level = <2>; clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; operating-points-v2 = <&cluster0_opp>; }; @@ -2236,6 +2240,7 @@ polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 0>; + sustainable-power = <2439>; trips { sensor1_crit: sensor1-crit { @@ -2250,6 +2255,7 @@ polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 1>; + sustainable-power = <2439>; trips { sensor2_crit: sensor2-crit { @@ -2264,14 +2270,37 @@ polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 2>; + sustainable-power = <2439>; trips { + threshold: trip-point0 { + /* miliCelsius */ + temperature = <90000>; + hysteresis = <1000>; + type = "passive"; + }; + + target: trip-point1 { + /* miliCelsius */ + temperature = <100000>; + hysteresis = <1000>; + type = "passive"; + }; + sensor3_crit: sensor3-crit { temperature = <120000>; hysteresis = <1000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&target>; + cooling-device = <&a57_0 0 2>; + contribution = <1024>; + }; + }; }; };