@@ -6,6 +6,8 @@
"Run AArch32 guest"), \
OPT_BOOLEAN('\0', "pmu", &(cfg)->has_pmuv3, \
"Create PMUv3 device"), \
+ OPT_BOOLEAN('\0', "sve", &(cfg)->has_sve, \
+ "Enable SVE for the guest"), \
OPT_BOOLEAN('\0', "show-reg-list", &(cfg)->show_reg_list, \
"Show the list of KVM register IDs on startup"), \
OPT_U64('\0', "kaslr-seed", &(cfg)->kaslr_seed, \
@@ -8,7 +8,8 @@
#define ARM_VCPU_FEATURE_FLAGS(kvm, cpuid) { \
[0] = ((!!(cpuid) << KVM_ARM_VCPU_POWER_OFF) | \
(!!(kvm)->cfg.arch.aarch32_guest << KVM_ARM_VCPU_EL1_32BIT) | \
- (!!(kvm)->cfg.arch.has_pmuv3 << KVM_ARM_VCPU_PMU_V3)) \
+ (!!(kvm)->cfg.arch.has_pmuv3 << KVM_ARM_VCPU_PMU_V3) | \
+ (!!(kvm)->cfg.arch.has_sve << KVM_ARM_VCPU_SVE)) \
}
#define ARM_MPIDR_HWID_BITMASK 0xFF00FFFFFFUL
@@ -9,6 +9,7 @@ struct kvm_config_arch {
bool virtio_trans_pci;
bool aarch32_guest;
bool has_pmuv3;
+ bool has_sve;
bool show_reg_list;
u64 kaslr_seed;
enum irqchip_type irqchip;
For compatibility reasons, new vcpus created by KVM always have SVE disabled by default. To enable SVE to be turned on, this patch adds an option --sve. Currently, no independent control is added per-vcpu. This means that it is not currently possible to create a VM containing a mix of SVE-enabled and non-SVE-enabled vcpus. This functionality could be added later if desired. Signed-off-by: Dave Martin <Dave.Martin@arm.com> --- arm/aarch64/include/kvm/kvm-config-arch.h | 2 ++ arm/aarch64/include/kvm/kvm-cpu-arch.h | 3 ++- arm/include/arm-common/kvm-config-arch.h | 1 + 3 files changed, 5 insertions(+), 1 deletion(-)