| Message ID | 1548084825-8803-21-git-send-email-julien.thierry@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: provide pseudo NMI with GICv3 | expand |
On Mon, 21 Jan 2019 15:33:39 +0000, Julien Thierry <julien.thierry@arm.com> wrote: > > Provide a higher priority to be used for pseudo-NMIs. When such an > interrupt is received, keep interrupts fully disabled at CPU level to > prevent receiving other pseudo-NMIs while handling the current one. > > Signed-off-by: Julien Thierry <julien.thierry@arm.com> > Cc: Thomas Gleixner <tglx@linutronix.de> > Cc: Jason Cooper <jason@lakedaemon.net> > Cc: Marc Zyngier <marc.zyngier@arm.com> > --- > drivers/irqchip/irq-gic-v3.c | 42 ++++++++++++++++++++++++++++++++++++------ > 1 file changed, 36 insertions(+), 6 deletions(-) > > diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c > index 5374b43..4df1e94 100644 > --- a/drivers/irqchip/irq-gic-v3.c > +++ b/drivers/irqchip/irq-gic-v3.c > @@ -41,6 +41,8 @@ > > #include "irq-gic-common.h" > > +#define GICD_INT_NMI_PRI (GICD_INT_DEF_PRI & ~0x80) > + > #define FLAGS_WORKAROUND_GICR_WAKER_MSM8996 (1ULL << 0) > > struct redist_region { > @@ -381,12 +383,45 @@ static u64 gic_mpidr_to_affinity(unsigned long mpidr) > return aff; > } > > +static inline void gic_deactivate_unexpected_irq(u32 irqnr) Same remark as on some other patches: you should be able to drop the inline attribute without any ill effect. I'd also like this to be renamed "gic_deactivate_spurious", or something similar. > +{ > + if (static_branch_likely(&supports_deactivate_key)) { > + if (irqnr < 8192) > + gic_write_dir(irqnr); > + } else { > + gic_write_eoir(irqnr); > + } > +} > + > +static inline void gic_handle_nmi(u32 irqnr, struct pt_regs *regs) > +{ > + int err; > + > + if (static_branch_likely(&supports_deactivate_key)) > + gic_write_eoir(irqnr); > + /* > + * Leave the PSR.I bit set to prevent other NMIs to be > + * received while handling this one. > + * PSR.I will be restored when we ERET to the > + * interrupted context. > + */ > + err = handle_domain_nmi(gic_data.domain, irqnr, regs); So this is the point where we start having a dependency on the NMI series. We definitely need to start talking merge strategy. > + if (err) > + gic_deactivate_unexpected_irq(irqnr); > +} > + > static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) > { > u32 irqnr; > > irqnr = gic_read_iar(); > > + if (gic_supports_nmi() && > + unlikely(gic_read_rpr() == GICD_INT_NMI_PRI)) { > + gic_handle_nmi(irqnr, regs); > + return; > + } > + > if (gic_prio_masking_enabled()) { > gic_pmr_mask_irqs(); > gic_arch_enable_irqs(); > @@ -403,12 +438,7 @@ static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs > err = handle_domain_irq(gic_data.domain, irqnr, regs); > if (err) { > WARN_ONCE(true, "Unexpected interrupt received!\n"); > - if (static_branch_likely(&supports_deactivate_key)) { > - if (irqnr < 8192) > - gic_write_dir(irqnr); > - } else { > - gic_write_eoir(irqnr); > - } > + gic_deactivate_unexpected_irq(irqnr); > } > return; > } > -- > 1.9.1 > With the above addressed, Acked-by: Marc Zyngier <marc.zyngier@arm.com> M.
On 28/01/2019 11:59, Marc Zyngier wrote: > On Mon, 21 Jan 2019 15:33:39 +0000, > Julien Thierry <julien.thierry@arm.com> wrote: >> >> Provide a higher priority to be used for pseudo-NMIs. When such an >> interrupt is received, keep interrupts fully disabled at CPU level to >> prevent receiving other pseudo-NMIs while handling the current one. >> >> Signed-off-by: Julien Thierry <julien.thierry@arm.com> >> Cc: Thomas Gleixner <tglx@linutronix.de> >> Cc: Jason Cooper <jason@lakedaemon.net> >> Cc: Marc Zyngier <marc.zyngier@arm.com> >> --- >> drivers/irqchip/irq-gic-v3.c | 42 ++++++++++++++++++++++++++++++++++++------ >> 1 file changed, 36 insertions(+), 6 deletions(-) >> >> diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c >> index 5374b43..4df1e94 100644 >> --- a/drivers/irqchip/irq-gic-v3.c >> +++ b/drivers/irqchip/irq-gic-v3.c >> @@ -41,6 +41,8 @@ >> >> #include "irq-gic-common.h" >> >> +#define GICD_INT_NMI_PRI (GICD_INT_DEF_PRI & ~0x80) >> + >> #define FLAGS_WORKAROUND_GICR_WAKER_MSM8996 (1ULL << 0) >> >> struct redist_region { >> @@ -381,12 +383,45 @@ static u64 gic_mpidr_to_affinity(unsigned long mpidr) >> return aff; >> } >> >> +static inline void gic_deactivate_unexpected_irq(u32 irqnr) > > Same remark as on some other patches: you should be able to drop the > inline attribute without any ill effect. I'd also like this to be > renamed "gic_deactivate_spurious", or something similar. > I'm a bit concern about using spurious since it is not related to GICC_INT_SPURIOUS, we actually read a valid IRQ number, we just don't know how we should handle it. Would "gic_deactivate_unhandled" work? Or "gic_deactivate_bad"? Thanks,
On Tue, 29 Jan 2019 11:33:35 +0000, Julien Thierry <julien.thierry@arm.com> wrote: > > > > On 28/01/2019 11:59, Marc Zyngier wrote: > > On Mon, 21 Jan 2019 15:33:39 +0000, > > Julien Thierry <julien.thierry@arm.com> wrote: > >> > >> Provide a higher priority to be used for pseudo-NMIs. When such an > >> interrupt is received, keep interrupts fully disabled at CPU level to > >> prevent receiving other pseudo-NMIs while handling the current one. > >> > >> Signed-off-by: Julien Thierry <julien.thierry@arm.com> > >> Cc: Thomas Gleixner <tglx@linutronix.de> > >> Cc: Jason Cooper <jason@lakedaemon.net> > >> Cc: Marc Zyngier <marc.zyngier@arm.com> > >> --- > >> drivers/irqchip/irq-gic-v3.c | 42 ++++++++++++++++++++++++++++++++++++------ > >> 1 file changed, 36 insertions(+), 6 deletions(-) > >> > >> diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c > >> index 5374b43..4df1e94 100644 > >> --- a/drivers/irqchip/irq-gic-v3.c > >> +++ b/drivers/irqchip/irq-gic-v3.c > >> @@ -41,6 +41,8 @@ > >> > >> #include "irq-gic-common.h" > >> > >> +#define GICD_INT_NMI_PRI (GICD_INT_DEF_PRI & ~0x80) > >> + > >> #define FLAGS_WORKAROUND_GICR_WAKER_MSM8996 (1ULL << 0) > >> > >> struct redist_region { > >> @@ -381,12 +383,45 @@ static u64 gic_mpidr_to_affinity(unsigned long mpidr) > >> return aff; > >> } > >> > >> +static inline void gic_deactivate_unexpected_irq(u32 irqnr) > > > > Same remark as on some other patches: you should be able to drop the > > inline attribute without any ill effect. I'd also like this to be > > renamed "gic_deactivate_spurious", or something similar. > > > > I'm a bit concern about using spurious since it is not related to > GICC_INT_SPURIOUS, we actually read a valid IRQ number, we just don't > know how we should handle it. Well, I'd say that in the case of GICC_INT_SPURIOUS, there is nothing to deactivate, but hey... ;-) > Would "gic_deactivate_unhandled" work? Or "gic_deactivate_bad"? Sure, any will do. M.
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 5374b43..4df1e94 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -41,6 +41,8 @@ #include "irq-gic-common.h" +#define GICD_INT_NMI_PRI (GICD_INT_DEF_PRI & ~0x80) + #define FLAGS_WORKAROUND_GICR_WAKER_MSM8996 (1ULL << 0) struct redist_region { @@ -381,12 +383,45 @@ static u64 gic_mpidr_to_affinity(unsigned long mpidr) return aff; } +static inline void gic_deactivate_unexpected_irq(u32 irqnr) +{ + if (static_branch_likely(&supports_deactivate_key)) { + if (irqnr < 8192) + gic_write_dir(irqnr); + } else { + gic_write_eoir(irqnr); + } +} + +static inline void gic_handle_nmi(u32 irqnr, struct pt_regs *regs) +{ + int err; + + if (static_branch_likely(&supports_deactivate_key)) + gic_write_eoir(irqnr); + /* + * Leave the PSR.I bit set to prevent other NMIs to be + * received while handling this one. + * PSR.I will be restored when we ERET to the + * interrupted context. + */ + err = handle_domain_nmi(gic_data.domain, irqnr, regs); + if (err) + gic_deactivate_unexpected_irq(irqnr); +} + static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) { u32 irqnr; irqnr = gic_read_iar(); + if (gic_supports_nmi() && + unlikely(gic_read_rpr() == GICD_INT_NMI_PRI)) { + gic_handle_nmi(irqnr, regs); + return; + } + if (gic_prio_masking_enabled()) { gic_pmr_mask_irqs(); gic_arch_enable_irqs(); @@ -403,12 +438,7 @@ static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs err = handle_domain_irq(gic_data.domain, irqnr, regs); if (err) { WARN_ONCE(true, "Unexpected interrupt received!\n"); - if (static_branch_likely(&supports_deactivate_key)) { - if (irqnr < 8192) - gic_write_dir(irqnr); - } else { - gic_write_eoir(irqnr); - } + gic_deactivate_unexpected_irq(irqnr); } return; }
Provide a higher priority to be used for pseudo-NMIs. When such an interrupt is received, keep interrupts fully disabled at CPU level to prevent receiving other pseudo-NMIs while handling the current one. Signed-off-by: Julien Thierry <julien.thierry@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> --- drivers/irqchip/irq-gic-v3.c | 42 ++++++++++++++++++++++++++++++++++++------ 1 file changed, 36 insertions(+), 6 deletions(-)