diff mbox series

[RFC,V0,2/7] dts: arm64: mt8183: Add ISP Pass 1 shared memory node

Message ID 1549348966-14451-3-git-send-email-frederic.chen@mediatek.com (mailing list archive)
State RFC
Headers show
Series media: platform: Add support for ISP Pass 1 on mt8183 SoC | expand

Commit Message

Frederic Chen Feb. 5, 2019, 6:42 a.m. UTC 
From: Jungo Lin <jungo.lin@mediatek.com>

This patch adds a shared memory region used on mt8183 for
exchanging tuning data between co-processor and the
Pass 1 unit of the camera ISP system

Signed-off-by: Jungo Lin <jungo.lin@mediatek.com>
Signed-off-by: Frederic Chen <frederic.chen@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 63db9cc..3b85a6c 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -109,6 +109,19 @@ 
 		};
 	};
 
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		reserve-memory-cam_smem {
+			compatible = "mediatek,reserve-memory-cam_smem";
+			no-map;
+			size = <0 0x01400000>; /*20 MB share mem size */
+			alignment = <0 0x1000>;
+			alloc-ranges = <0 0x40000000 0 0x10000000>;
+		};
+	};
+
 	pmu-a53 {
 		compatible = "arm,cortex-a53-pmu";
 		interrupt-parent = <&gic>;
@@ -405,4 +418,5 @@ 
 		reg = <0 0x1a000000 0 0x1000>;
 		#clock-cells = <1>;
 	};
+
 };