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Tue, 26 Mar 2019 15:14:19 +0000 Received: from vidyas-desktop.nvidia.com (Not Verified[10.24.37.38]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Tue, 26 Mar 2019 08:14:19 -0700 From: Vidya Sagar To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH 01/10] PCI: save pci_bus pointer in pcie_port structure Date: Tue, 26 Mar 2019 20:43:18 +0530 Message-ID: <1553613207-3988-2-git-send-email-vidyas@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1553613207-3988-1-git-send-email-vidyas@nvidia.com> References: <1553613207-3988-1-git-send-email-vidyas@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1553613256; bh=ajoC/pclit004a1DH0iOXhHMxfdpECOLvK6JLTZhJKQ=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=BJAuOBjyWFwg7r516BafCaDbsdk4nuDCtjbKFVYdWQNeiS8LJru9ZPI8ikHLj9juV TcQuoMNHDhQKSabahrxVHvJjiIEVep8dZEiKLUMHm7lcoa6vRSen5QUNl+Z5pcq34n bdLp896dGbpngZKf4qra/5FQiimAfzreB3NA6+bsuh1aTku15pQz4nqGi8wkuqolK+ oHPIhnYNCyQptfGC021zgyhZcstzO+OpzL6uQJbzFR/0ntXVlBS+EN8YoAc8T5PwtU d17gtLE9aj7Hxos3j4xMYufCXwURFEsiytBExOh8PDJsJ6QRk9cca9V1PiK6HL9TVq AWnLvIjiC4qpg== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190326_081421_777880_AE503387 X-CRM114-Status: GOOD ( 10.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, mmaddireddy@nvidia.com, kthota@nvidia.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP save pci_bus pointer created by PCIe sub-system's pci_scan_root_bus_bridge() to be used by host controller drivers for post processing. Tegra host controller driver needs it for the following reasons - to derive pci_host_bridge structure from pci_bus which is used to configure iATU's outbound regions for different windows accesses - to traverse and configure downstream hierarchy. One such case is, configuring all immediate downstream devices to D0 state before transiting link to L2 state. Saving pci_bus pointer seems the best method compared to deriving it by other means. Signed-off-by: Vidya Sagar --- drivers/pci/controller/dwc/pcie-designware-host.c | 1 + drivers/pci/controller/dwc/pcie-designware.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 25087d3c9a82..15add3cf3945 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -494,6 +494,7 @@ int dw_pcie_host_init(struct pcie_port *pp) goto error; bus = bridge->bus; + pp->bus = bus; if (pp->ops->scan_bus) pp->ops->scan_bus(pp); diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 377f4c0b52da..70007276bc93 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -175,6 +175,7 @@ struct pcie_port { struct resource *busn; int irq; const struct dw_pcie_host_ops *ops; + struct pci_bus *bus; int msi_irq; struct irq_domain *irq_domain; struct irq_domain *msi_domain;