@@ -37,7 +37,7 @@ struct logic_pio_host_ops {
size_t dwidth, unsigned int count);
};
-#ifdef CONFIG_INDIRECT_PIO
+#if defined(PCI_IOBASE)
u8 logic_inb(unsigned long addr);
void logic_outb(u8 value, unsigned long addr);
void logic_outw(u16 value, unsigned long addr);
@@ -102,6 +102,7 @@ void logic_outsl(unsigned long addr, const void *buffer, unsigned int count);
#define outsl logic_outsl
#endif
+#if defined(CONFIG_INDIRECT_PIO)
/*
* We reserve 0x4000 bytes for Indirect IO as so far this library is only
* used by the HiSilicon LPC Host. If needed, we can reserve a wider IO
@@ -109,10 +110,10 @@ void logic_outsl(unsigned long addr, const void *buffer, unsigned int count);
*/
#define PIO_INDIRECT_SIZE 0x4000
#define MMIO_UPPER_LIMIT (IO_SPACE_LIMIT - PIO_INDIRECT_SIZE)
-#else
+#else /* CONFIG_INDIRECT_PIO */
#define MMIO_UPPER_LIMIT IO_SPACE_LIMIT
#endif /* CONFIG_INDIRECT_PIO */
-
+#endif /* PCI_IOBASE */
struct logic_pio_hwaddr *find_io_range_by_fwnode(struct fwnode_handle *fwnode);
unsigned long logic_pio_trans_hwaddr(struct fwnode_handle *fwnode,
resource_size_t hw_addr, resource_size_t size);
@@ -191,7 +191,8 @@ unsigned long logic_pio_trans_cpuaddr(resource_size_t addr)
return ~0UL;
}
-#if defined(CONFIG_INDIRECT_PIO) && defined(PCI_IOBASE)
+#if defined(PCI_IOBASE)
+#if defined(CONFIG_INDIRECT_PIO)
#define BUILD_LOGIC_IO(bw, type) \
type logic_in##bw(unsigned long addr) \
{ \
@@ -201,10 +202,10 @@ type logic_in##bw(unsigned long addr) \
ret = read##bw(PCI_IOBASE + addr); \
} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
struct logic_pio_hwaddr *entry = find_io_range(addr); \
+ size_t sz = sizeof(type); \
\
if (entry && entry->ops) \
- ret = entry->ops->in(entry->hostdata, \
- addr, sizeof(type)); \
+ ret = entry->ops->in(entry->hostdata, addr, sz);\
else \
WARN_ON_ONCE(1); \
} \
@@ -217,48 +218,82 @@ void logic_out##bw(type value, unsigned long addr) \
write##bw(value, PCI_IOBASE + addr); \
} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
struct logic_pio_hwaddr *entry = find_io_range(addr); \
+ size_t sz = sizeof(type); \
\
if (entry && entry->ops) \
entry->ops->out(entry->hostdata, \
- addr, value, sizeof(type)); \
+ addr, value, sz); \
else \
WARN_ON_ONCE(1); \
} \
} \
\
-void logic_ins##bw(unsigned long addr, void *buffer, \
- unsigned int count) \
+void logic_ins##bw(unsigned long addr, void *buf, unsigned int cnt) \
{ \
if (addr < MMIO_UPPER_LIMIT) { \
- reads##bw(PCI_IOBASE + addr, buffer, count); \
+ reads##bw(PCI_IOBASE + addr, buf, cnt); \
} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
struct logic_pio_hwaddr *entry = find_io_range(addr); \
+ size_t sz = sizeof(type); \
\
if (entry && entry->ops) \
entry->ops->ins(entry->hostdata, \
- addr, buffer, sizeof(type), count); \
+ addr, buf, sz, cnt); \
else \
WARN_ON_ONCE(1); \
} \
\
} \
\
-void logic_outs##bw(unsigned long addr, const void *buffer, \
- unsigned int count) \
+void logic_outs##bw(unsigned long addr, const void *buf, \
+ unsigned int cnt) \
{ \
if (addr < MMIO_UPPER_LIMIT) { \
- writes##bw(PCI_IOBASE + addr, buffer, count); \
+ writes##bw(PCI_IOBASE + addr, buf, cnt); \
} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
struct logic_pio_hwaddr *entry = find_io_range(addr); \
+ size_t sz = sizeof(type); \
\
if (entry && entry->ops) \
entry->ops->outs(entry->hostdata, \
- addr, buffer, sizeof(type), count); \
+ addr, buf, sz, cnt); \
else \
WARN_ON_ONCE(1); \
} \
}
+#else /* CONFIG_INDIRECT_PIO */
+
+#define BUILD_LOGIC_IO(bw, type) \
+type logic_in##bw(unsigned long addr) \
+{ \
+ type ret = (type)~0; \
+ \
+ if (addr < MMIO_UPPER_LIMIT) \
+ ret = read##bw(PCI_IOBASE + addr); \
+ return ret; \
+} \
+ \
+void logic_out##bw(type value, unsigned long addr) \
+{ \
+ if (addr < MMIO_UPPER_LIMIT) \
+ write##bw(value, PCI_IOBASE + addr); \
+} \
+ \
+void logic_ins##bw(unsigned long addr, void *buf, unsigned int cnt) \
+{ \
+ if (addr < MMIO_UPPER_LIMIT) \
+ reads##bw(PCI_IOBASE + addr, buf, cnt); \
+} \
+ \
+void logic_outs##bw(unsigned long addr, const void *buf, \
+ unsigned int cnt) \
+{ \
+ if (addr < MMIO_UPPER_LIMIT) \
+ writes##bw(PCI_IOBASE + addr, buf, cnt); \
+}
+#endif /* CONFIG_INDIRECT_PIO */
+
BUILD_LOGIC_IO(b, u8)
EXPORT_SYMBOL(logic_inb);
EXPORT_SYMBOL(logic_insb);
@@ -277,4 +312,4 @@ EXPORT_SYMBOL(logic_insl);
EXPORT_SYMBOL(logic_outl);
EXPORT_SYMBOL(logic_outsl);
-#endif /* CONFIG_INDIRECT_PIO && PCI_IOBASE */
+#endif /* PCI_IOBASE */
Currently we only use logical PIO low-level accessors for when CONFIG_INDIRECT_PIO is enabled. Otherwise we just use inb/out et all directly. It is useful to now use logical PIO accessors for all cases, so we can add legality checks to accesses. Such a check would be for ensuring that the PCI IO port has been IO remapped prior to the access. Using the logical PIO accesses will add a little processing overhead, but that's ok as IO port accesses are relatively slow anyway. Some changes are also made to stop spilling so many lines under CONFIG_INDIRECT_PIO. Signed-off-by: John Garry <john.garry@huawei.com> --- include/linux/logic_pio.h | 7 +++-- lib/logic_pio.c | 61 ++++++++++++++++++++++++++++++--------- 2 files changed, 52 insertions(+), 16 deletions(-)