From patchwork Tue Apr 16 14:22:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Thierry X-Patchwork-Id: 10903217 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6805B1515 for ; Tue, 16 Apr 2019 14:23:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 49BC028720 for ; Tue, 16 Apr 2019 14:23:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3CDFB2875F; Tue, 16 Apr 2019 14:23:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C6D1928720 for ; Tue, 16 Apr 2019 14:23:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=TscRiThnu+fdyjFOaZXDW6FU9cgG1frepsl+vboAVWo=; b=XY7yyUwfAWl5mtFKuIchv4OZBn TZptXpeK/D2lq4LHYfeFJXffRepy7Nb0t5h2j70QVsIPQcxSJHXT4174459uQIdYgmkByIOYne1UF qna9iA6ZpBtFD7d90dQ5BBb9JuyfVzbRtqA8BTjijZmYGkdr1IrZftEfPwgQ4jX/TbmvA7M6M0qNW K00s9VV4vmq8BGVisrWTGG0aGnKVuod4vDC5Sn8B+UgVIX8rYZRkM8ZXFgPq+tzMLDOkB752ISY2u Der2Lg4Pv7Cx16Dop1GUqrcvcjskQNTxKlFU9mNVlFDVGEG3NF0IqNqCJULjSp0M5LVXhzd9Y47Ys NrCSW6xw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hGOzo-0005q9-06; Tue, 16 Apr 2019 14:23:36 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hGOz9-00054e-Ep for linux-arm-kernel@lists.infradead.org; Tue, 16 Apr 2019 14:22:59 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B1ECB1682; Tue, 16 Apr 2019 07:22:54 -0700 (PDT) Received: from e112298-lin.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8FE713F59C; Tue, 16 Apr 2019 07:22:52 -0700 (PDT) From: Julien Thierry To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/4] arm64: irqflags: Introduce explicit debugging for IRQ priorities Date: Tue, 16 Apr 2019 15:22:36 +0100 Message-Id: <1555424556-46023-5-git-send-email-julien.thierry@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1555424556-46023-1-git-send-email-julien.thierry@arm.com> References: <1555424556-46023-1-git-send-email-julien.thierry@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190416_072255_894998_E2565D81 X-CRM114-Status: GOOD ( 14.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, Julien Thierry , marc.zyngier@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, rostedt@goodmis.org, james.morse@arm.com, yuzenghui@huawei.com, wanghaibin.wang@huawei.com, liwei391@huawei.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Using IRQ priority masking to enable/disable interrupts is a bit sensitive as it requires to deal with both ICC_PMR_EL1 and PSR.I. Introduce some validity checks to both highlight the states in which functions dealing with IRQ enabling/disabling can (not) be called, and bark a warning when called in an unexpected state. Since these checks are done on hotpaths, introduce a build option to choose whether to do the checking. Signed-off-by: Julien Thierry Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/Kconfig | 11 +++++++++++ arch/arm64/include/asm/daifflags.h | 9 +++++++++ arch/arm64/include/asm/irqflags.h | 23 +++++++++++++++++++++-- 3 files changed, 41 insertions(+), 2 deletions(-) -- 1.9.1 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 7e34b9e..3fb38f3 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1359,6 +1359,17 @@ config ARM64_PSEUDO_NMI If unsure, say N +if ARM64_PSEUDO_NMI +config ARM64_DEBUG_PRIORITY_MASKING + bool "Debug interrupt priority masking" + help + This adds runtime checks to functions enabling/disabling + interrupts when using priority masking. The additional checks verify + the validity of ICC_PMR_EL1 when calling concerned functions. + + If unsure, say N +endif + config RELOCATABLE bool help diff --git a/arch/arm64/include/asm/daifflags.h b/arch/arm64/include/asm/daifflags.h index e575fdb..0a1add9 100644 --- a/arch/arm64/include/asm/daifflags.h +++ b/arch/arm64/include/asm/daifflags.h @@ -28,6 +28,10 @@ /* mask/save/unmask/restore all exceptions, including interrupts. */ static inline void local_daif_mask(void) { + WARN_ON(IS_ENABLED(CONFIG_ARM64_DEBUG_PRIORITY_MASKING) && + system_uses_irq_prio_masking() && + (read_sysreg_s(SYS_ICC_PMR_EL1) & GIC_PRIO_WAIT_GIC_BIT)); + asm volatile( "msr daifset, #0xf // local_daif_mask\n" : @@ -62,6 +66,11 @@ static inline void local_daif_restore(unsigned long flags) { bool irq_disabled = flags & PSR_I_BIT; + WARN_ON(IS_ENABLED(CONFIG_ARM64_DEBUG_PRIORITY_MASKING) + && system_uses_irq_prio_masking() + && (!(read_sysreg(daif) & PSR_I_BIT) || + read_sysreg_s(SYS_ICC_PMR_EL1) & GIC_PRIO_WAIT_GIC_BIT)); + if (!irq_disabled) { trace_hardirqs_on(); diff --git a/arch/arm64/include/asm/irqflags.h b/arch/arm64/include/asm/irqflags.h index 4eeaa65..2cb13a7 100644 --- a/arch/arm64/include/asm/irqflags.h +++ b/arch/arm64/include/asm/irqflags.h @@ -40,6 +40,13 @@ */ static inline void arch_local_irq_enable(void) { + if (IS_ENABLED(CONFIG_ARM64_DEBUG_PRIORITY_MASKING) && + system_uses_irq_prio_masking()) { + u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1); + + WARN_ON(pmr != GIC_PRIO_IRQON && pmr != GIC_PRIO_IRQOFF); + } + asm volatile(ALTERNATIVE( "msr daifclr, #2 // arch_local_irq_enable\n" "nop", @@ -51,7 +58,7 @@ static inline void arch_local_irq_enable(void) : "memory"); } -static inline void arch_local_irq_disable(void) +static inline void _arch_local_irq_disable_nocheck(void) { asm volatile(ALTERNATIVE( "msr daifset, #2 // arch_local_irq_disable", @@ -62,6 +69,18 @@ static inline void arch_local_irq_disable(void) : "memory"); } +static inline void arch_local_irq_disable(void) +{ + if (IS_ENABLED(CONFIG_ARM64_DEBUG_PRIORITY_MASKING) && + system_uses_irq_prio_masking()) { + u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1); + + WARN_ON(pmr != GIC_PRIO_IRQON && pmr != GIC_PRIO_IRQOFF); + } + + _arch_local_irq_disable_nocheck(); +} + /* * Save the current interrupt enable state. */ @@ -86,7 +105,7 @@ static inline unsigned long arch_local_irq_save(void) flags = arch_local_save_flags(); - arch_local_irq_disable(); + _arch_local_irq_disable_nocheck(); return flags; }