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Thu, 2 May 2019 08:06:42 +0000 From: Abel Vesa To: Mike Turquette , Stephen Boyd , Shawn Guo , Fabio Estevam , Sascha Hauer Subject: [PATCH v2 03/18] clk: imx6q: Do not reparent uninitialized IMX6QDL_CLK_PERIPH2 clock Thread-Topic: [PATCH v2 03/18] clk: imx6q: Do not reparent uninitialized IMX6QDL_CLK_PERIPH2 clock Thread-Index: AQHVAL36FVOgLCrgTk2aJfrH28ZViw== Date: Thu, 2 May 2019 08:06:42 +0000 Message-ID: <1556784376-7191-4-git-send-email-abel.vesa@nxp.com> References: <1556784376-7191-1-git-send-email-abel.vesa@nxp.com> In-Reply-To: <1556784376-7191-1-git-send-email-abel.vesa@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: VI1PR0501CA0041.eurprd05.prod.outlook.com (2603:10a6:800:60::27) To AM0PR04MB5779.eurprd04.prod.outlook.com (2603:10a6:208:131::23) x-originating-ip: [89.37.124.34] authentication-results: spf=none (sender IP is ) smtp.mailfrom=abel.vesa@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.7.4 x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: b40d0542-088f-4e6d-c8e2-08d6ced51c77 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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Signed-off-by: Abel Vesa --- drivers/clk/imx/clk-imx6q.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c index 708e7c5..c7b671e 100644 --- a/drivers/clk/imx/clk-imx6q.c +++ b/drivers/clk/imx/clk-imx6q.c @@ -291,12 +291,6 @@ static void mmdc_ch1_disable(void __iomem *ccm_base) clk_set_parent(clk[IMX6QDL_CLK_PERIPH2_CLK2_SEL], clk[IMX6QDL_CLK_PLL3_USB_OTG]); - /* - * Handshake with mmdc_ch1 module must be masked when changing - * periph2_clk_sel. - */ - clk_set_parent(clk[IMX6QDL_CLK_PERIPH2], clk[IMX6QDL_CLK_PERIPH2_CLK2]); - /* Disable pll3_sw_clk by selecting the bypass clock source */ reg = readl_relaxed(ccm_base + CCM_CCSR); reg |= CCSR_PLL3_SW_CLK_SEL; @@ -311,8 +305,6 @@ static void mmdc_ch1_reenable(void __iomem *ccm_base) reg = readl_relaxed(ccm_base + CCM_CCSR); reg &= ~CCSR_PLL3_SW_CLK_SEL; writel_relaxed(reg, ccm_base + CCM_CCSR); - - clk_set_parent(clk[IMX6QDL_CLK_PERIPH2], clk[IMX6QDL_CLK_PERIPH2_PRE]); } /*