| Message ID | 1559813517-41540-4-git-send-email-julien.thierry@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: IRQ priority masking and Pseudo-NMI fixes | expand |
diff --git a/arch/arm64/include/asm/irqflags.h b/arch/arm64/include/asm/irqflags.h index 9c93152..fbe1aba 100644 --- a/arch/arm64/include/asm/irqflags.h +++ b/arch/arm64/include/asm/irqflags.h @@ -92,7 +92,7 @@ static inline unsigned long arch_local_save_flags(void) ARM64_HAS_IRQ_PRIO_MASKING) : "=&r" (flags), "+r" (daif_bits) : "r" ((unsigned long) GIC_PRIO_IRQOFF) - : "memory"); + : "cc", "memory"); return flags; } @@ -136,7 +136,7 @@ static inline int arch_irqs_disabled_flags(unsigned long flags) ARM64_HAS_IRQ_PRIO_MASKING) : "=&r" (res) : "r" ((int) flags) - : "memory"); + : "cc", "memory"); return res; }
Some of the inline assembly instruction use the condition flags and need to include "cc" in the clobber list. Fixes: commit 4a503217ce37 ("arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking") Suggested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Julien Thierry <julien.thierry@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> --- arch/arm64/include/asm/irqflags.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 1.9.1