| Message ID | 1562155311-24696-1-git-send-email-abel.vesa@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] arm64: dts: imx8mq: Init rates and parents configs for clocks | expand |
On Wed, Jul 3, 2019 at 3:03 PM Abel Vesa <abel.vesa@nxp.com> wrote: > > Add the initial configuration for clocks that need default parent and rate > setting. This is based on the vendor tree clock provider parents and rates > configuration except this is doing the setup in dts rather then using clock > consumer API in a clock provider driver. > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> For audio related clock: Acked-by: Daniel Baluta <daniel.baluta@nxp.com> > --- > > Changes since v1: > - removed the PCIE and CSI clocks parent setting since > that should be done from their driver, as suggested > by Leonard. > > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > index d09b808..c286f20 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi > @@ -489,6 +489,20 @@ > clock-names = "ckil", "osc_25m", "osc_27m", > "clk_ext1", "clk_ext2", > "clk_ext3", "clk_ext4"; > + assigned-clocks = <&clk IMX8MQ_VIDEO_PLL1>, > + <&clk IMX8MQ_CLK_AHB>, > + <&clk IMX8MQ_CLK_NAND_USDHC_BUS>, > + <&clk IMX8MQ_CLK_AUDIO_AHB>, > + <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>, > + <&clk IMX8MQ_CLK_NOC>; > + assigned-clock-parents = <0>, > + <&clk IMX8MQ_SYS1_PLL_133M>, > + <&clk IMX8MQ_SYS1_PLL_266M>, > + <&clk IMX8MQ_SYS2_PLL_500M>, > + <&clk IMX8MQ_CLK_27M>, > + <&clk IMX8MQ_SYS1_PLL_800M>; > + assigned-clock-rates = <593999999>; > + > }; > > src: reset-controller@30390000 { > -- > 2.7.4 >
On Wed, Jul 3, 2019 at 4:05 PM Daniel Baluta <daniel.baluta@gmail.com> wrote: > > On Wed, Jul 3, 2019 at 3:03 PM Abel Vesa <abel.vesa@nxp.com> wrote: > > > > Add the initial configuration for clocks that need default parent and rate > > setting. This is based on the vendor tree clock provider parents and rates > > configuration except this is doing the setup in dts rather then using clock > > consumer API in a clock provider driver. > > > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > > For audio related clock: > Acked-by: Daniel Baluta <daniel.baluta@nxp.com> Shawn, Please ignore this patch. I've added some improvements. New patch is: [PATCH v4] arm64: dts: imx8mq: Init rates and parents configs for clocks
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index d09b808..c286f20 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -489,6 +489,20 @@ clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1", "clk_ext2", "clk_ext3", "clk_ext4"; + assigned-clocks = <&clk IMX8MQ_VIDEO_PLL1>, + <&clk IMX8MQ_CLK_AHB>, + <&clk IMX8MQ_CLK_NAND_USDHC_BUS>, + <&clk IMX8MQ_CLK_AUDIO_AHB>, + <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>, + <&clk IMX8MQ_CLK_NOC>; + assigned-clock-parents = <0>, + <&clk IMX8MQ_SYS1_PLL_133M>, + <&clk IMX8MQ_SYS1_PLL_266M>, + <&clk IMX8MQ_SYS2_PLL_500M>, + <&clk IMX8MQ_CLK_27M>, + <&clk IMX8MQ_SYS1_PLL_800M>; + assigned-clock-rates = <593999999>; + }; src: reset-controller@30390000 {
Add the initial configuration for clocks that need default parent and rate setting. This is based on the vendor tree clock provider parents and rates configuration except this is doing the setup in dts rather then using clock consumer API in a clock provider driver. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> --- Changes since v1: - removed the PCIE and CSI clocks parent setting since that should be done from their driver, as suggested by Leonard. arch/arm64/boot/dts/freescale/imx8mq.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)