diff mbox series

[v3,5/5] ARM: dts: stm32: add ddrperfm on stm32mp157c

Message ID 1566918464-23927-6-git-send-email-gerald.baeza@st.com (mailing list archive)
State New, archived
Headers show
Series stm32-ddr-pmu driver creation | expand

Commit Message

Gerald BAEZA Aug. 27, 2019, 3:08 p.m. UTC
The DDRPERFM is the DDR Performance Monitor embedded
in STM32MP1 SOC.

Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
---
 arch/arm/boot/dts/stm32mp157c.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Alexandre TORGUE Aug. 29, 2019, 8:48 a.m. UTC | #1
Hi Gerald

On 8/27/19 5:08 PM, Gerald BAEZA wrote:
> The DDRPERFM is the DDR Performance Monitor embedded
> in STM32MP1 SOC.
> 
> Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
> ---
>   arch/arm/boot/dts/stm32mp157c.dtsi | 8 ++++++++
>   1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi 
> b/arch/arm/boot/dts/stm32mp157c.dtsi
> index 0c4e6eb..6ea6933 100644
> --- a/arch/arm/boot/dts/stm32mp157c.dtsi
> +++ b/arch/arm/boot/dts/stm32mp157c.dtsi
> @@ -1378,6 +1378,14 @@
>                           };
>                   };
> 
> +               ddrperfm: perf@5a007000 {
> +                       compatible = "st,stm32-ddr-pmu";
> +                       reg = <0x5a007000 0x400>;
> +                       clocks = <&rcc DDRPERFM>;
> +                       resets = <&rcc DDRPERFM_R>;
> +                       status = "okay";

No need to add "status = "okay"" here.

regards
Alex

> +               };
> +
>                   usart1: serial@5c000000 {
>                           compatible = "st,stm32h7-uart";
>                           reg = <0x5c000000 0x400>;
> -- 
> 2.7.4
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index 0c4e6eb..6ea6933 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -1378,6 +1378,14 @@ 
 			};
 		};
 
+		ddrperfm: perf@5a007000 {
+			compatible = "st,stm32-ddr-pmu";
+			reg = <0x5a007000 0x400>;
+			clocks = <&rcc DDRPERFM>;
+			resets = <&rcc DDRPERFM_R>;
+			status = "okay";
+		};
+
 		usart1: serial@5c000000 {
 			compatible = "st,stm32h7-uart";
 			reg = <0x5c000000 0x400>;