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Fri, 27 Sep 2019 02:23:44 +0000 Received: from DB7PR04MB4490.eurprd04.prod.outlook.com ([fe80::4427:96f2:f651:6dfa]) by DB7PR04MB4490.eurprd04.prod.outlook.com ([fe80::4427:96f2:f651:6dfa%5]) with mapi id 15.20.2284.023; Fri, 27 Sep 2019 02:23:44 +0000 From: Peng Fan To: "srinivas.kandagatla@linaro.org" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" Subject: [PATCH V2 2/2] nvmem: imx: scu: support write Thread-Topic: [PATCH V2 2/2] nvmem: imx: scu: support write Thread-Index: AQHVdNqWV3bDbWXLM0C9Hq/ux+/f2Q== Date: Fri, 27 Sep 2019 02:23:44 +0000 Message-ID: <1569550913-10176-2-git-send-email-peng.fan@nxp.com> References: <1569550913-10176-1-git-send-email-peng.fan@nxp.com> In-Reply-To: <1569550913-10176-1-git-send-email-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK2PR0401CA0021.apcprd04.prod.outlook.com (2603:1096:202:2::31) To DB7PR04MB4490.eurprd04.prod.outlook.com (2603:10a6:5:36::22) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:DB7PR04MB5338; H:DB7PR04MB4490.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: gCujlQzd4+7VoFPuc2ZiuLhrZJW+46k1YscePlrm0WAQmA2jzX/3GPdyq1Ek9LkXnqz6hmynUT5XQvicNl1dOV2YHJrjKJ3D35hNh/CH20AqEM/aduVSbVKkRKFGKM071FBS24le1PaUG2Lr0LWxdUdlWpyjWue011AVzzhjFuzjAGap3/OIvwxgNs0U9V9CKKFhlZx+64wKgbvVNXI/JMF+qDOGqvda1CZ8xYRzCtdDPpAvRDHTwWRFvm9YzRqwN/HtDXz9Djw1Usnm9QW/dzpyr8wB4vZAi/SIID//+8EHbEtuXgx/Fo6RWkQOIuk9FMTErp7etVVOHvuP/atX6Y5bwnu+ERAYbDuGuMmH4uW0tvJt0fG+Q0l0i/zxQUnSnWVVa5lT96gHmSS2yXNauHQa7kxLUC+MYMTjCsb+EWE= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: ed95b29c-9f14-4c8d-49dc-08d742f1b888 X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Sep 2019 02:23:44.8254 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Ozf6TbbjPxs41FdgzUPe9CteAxzfDPpEHZC5TpBOrZYsR57nUw1c/2npXz6Pxo4W71emE10/0OOZMnQisf1Row== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB7PR04MB5338 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190926_192346_403687_A4132EC8 X-CRM114-Status: GOOD ( 15.76 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [40.107.13.88 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aisheng Dong , Peng Fan , "linux-kernel@vger.kernel.org" , dl-linux-imx , "kernel@pengutronix.de" , "festevam@gmail.com" , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Peng Fan The fuse programming from non-secure world is blocked, so we could only use Arm Trusted Firmware SIP call to let ATF program fuse. Because there is ECC region that could only be programmed once, so add a heler in_ecc to check the ecc region. Signed-off-by: Peng Fan --- V2: Rebased on Latest linux-next drivers/nvmem/imx-ocotp-scu.c | 73 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 72 insertions(+), 1 deletion(-) diff --git a/drivers/nvmem/imx-ocotp-scu.c b/drivers/nvmem/imx-ocotp-scu.c index 030e27ba4dfb..03f1ab23ad51 100644 --- a/drivers/nvmem/imx-ocotp-scu.c +++ b/drivers/nvmem/imx-ocotp-scu.c @@ -7,6 +7,7 @@ * Peng Fan */ +#include #include #include #include @@ -14,6 +15,9 @@ #include #include +#define IMX_SIP_OTP 0xC200000A +#define IMX_SIP_OTP_WRITE 0x2 + enum ocotp_devtype { IMX8QXP, IMX8QM, @@ -46,6 +50,8 @@ struct imx_sc_msg_misc_fuse_read { u32 word; } __packed; +static DEFINE_MUTEX(scu_ocotp_mutex); + static struct ocotp_devtype_data imx8qxp_data = { .devtype = IMX8QXP, .nregs = 800, @@ -84,6 +90,23 @@ static bool in_hole(void *context, u32 index) return false; } +static bool in_ecc(void *context, u32 index) +{ + struct ocotp_priv *priv = context; + const struct ocotp_devtype_data *data = priv->data; + int i; + + for (i = 0; i < data->num_region; i++) { + if (data->region[i].flag & ECC_REGION) { + if ((index >= data->region[i].start) && + (index <= data->region[i].end)) + return true; + } + } + + return false; +} + static int imx_sc_misc_otp_fuse_read(struct imx_sc_ipc *ipc, u32 word, u32 *val) { @@ -127,6 +150,8 @@ static int imx_scu_ocotp_read(void *context, unsigned int offset, if (!p) return -ENOMEM; + mutex_lock(&scu_ocotp_mutex); + buf = p; for (i = index; i < (index + count); i++) { @@ -137,6 +162,7 @@ static int imx_scu_ocotp_read(void *context, unsigned int offset, ret = imx_sc_misc_otp_fuse_read(priv->nvmem_ipc, i, buf); if (ret) { + mutex_unlock(&scu_ocotp_mutex); kfree(p); return ret; } @@ -145,18 +171,63 @@ static int imx_scu_ocotp_read(void *context, unsigned int offset, memcpy(val, (u8 *)p + offset % 4, bytes); + mutex_unlock(&scu_ocotp_mutex); + kfree(p); return 0; } +static int imx_scu_ocotp_write(void *context, unsigned int offset, + void *val, size_t bytes) +{ + struct ocotp_priv *priv = context; + struct arm_smccc_res res; + u32 *buf = val; + u32 tmp; + u32 index; + int ret; + + /* allow only writing one complete OTP word at a time */ + if ((bytes != 4) || (offset % 4)) + return -EINVAL; + + index = offset >> 2; + + if (in_hole(context, index)) + return -EINVAL; + + if (in_ecc(context, index)) { + pr_warn("ECC region, only program once\n"); + mutex_lock(&scu_ocotp_mutex); + ret = imx_sc_misc_otp_fuse_read(priv->nvmem_ipc, index, &tmp); + mutex_unlock(&scu_ocotp_mutex); + if (ret) + return ret; + if (tmp) { + pr_warn("ECC region, already has value: %x\n", tmp); + return -EIO; + } + } + + mutex_lock(&scu_ocotp_mutex); + + arm_smccc_smc(IMX_SIP_OTP, IMX_SIP_OTP_WRITE, index, *buf, + 0, 0, 0, 0, &res); + + mutex_unlock(&scu_ocotp_mutex); + + return res.a0; +} + static struct nvmem_config imx_scu_ocotp_nvmem_config = { .name = "imx-scu-ocotp", - .read_only = true, + .read_only = false, .word_size = 4, .stride = 1, .owner = THIS_MODULE, .reg_read = imx_scu_ocotp_read, + .reg_write = imx_scu_ocotp_write, }; static const struct of_device_id imx_scu_ocotp_dt_ids[] = {