Message ID | 1570102888-13426-1-git-send-email-vladimir.murzin@arm.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | 4c0742f65b4ee466546fd24b71b56516cacd4613 |
Headers | show |
Series | ARM: NOMMU: Fix exc_ret for XIP | expand |
On Thu, Oct 03, 2019 at 12:41:28PM +0100, Vladimir Murzin wrote: > It was reported that 72cd4064fcca "NOMMU: Toggle only bits in > EXC_RETURN we are really care of" breaks NOMMU+XIP combination. > It happens because saved EXC_RETURN gets overwritten when data > section is relocated. > > The fix is to propagate EXC_RETURN via register and let relocation > code to commit that value into memory. > > Fixes: 72cd4064fcca ("ARM: 8830/1: NOMMU: Toggle only bits in EXC_RETURN we are really care of") Thanks Vladimir, cc stable as well ? Regards afzal
On 10/4/19 1:56 AM, afzal mohammed wrote: > On Thu, Oct 03, 2019 at 12:41:28PM +0100, Vladimir Murzin wrote: > >> It was reported that 72cd4064fcca "NOMMU: Toggle only bits in >> EXC_RETURN we are really care of" breaks NOMMU+XIP combination. >> It happens because saved EXC_RETURN gets overwritten when data >> section is relocated. >> >> The fix is to propagate EXC_RETURN via register and let relocation >> code to commit that value into memory. >> >> Fixes: 72cd4064fcca ("ARM: 8830/1: NOMMU: Toggle only bits in EXC_RETURN we are really care of") > > Thanks Vladimir, cc stable as well ? I believe they they watch "Fixes" tag ;) Cheers Vladimir > > Regards > afzal >
Hi Vladimir, On Thu, Oct 03, 2019 at 12:41:28PM +0100, Vladimir Murzin wrote: > It was reported that 72cd4064fcca "NOMMU: Toggle only bits in > EXC_RETURN we are really care of" breaks NOMMU+XIP combination. > It happens because saved EXC_RETURN gets overwritten when data > section is relocated. > > The fix is to propagate EXC_RETURN via register and let relocation > code to commit that value into memory. > > Fixes: 72cd4064fcca ("ARM: 8830/1: NOMMU: Toggle only bits in EXC_RETURN we are really care of") > > Reported-by: afzal mohammed <afzal.mohd.ma@gmail.com> > Tested-by: afzal mohammed <afzal.mohd.ma@gmail.com> > Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Can you please put this into rmk's patch system. STM32 Cortex-M boards are currently not booting in mainline, this change makes them boot again, verified on stm32f429 discovery board. Regards afzal
On Sat, Oct 12, 2019 at 12:07:25PM +0530, afzal mohammed wrote: > Hi Vladimir, > > On Thu, Oct 03, 2019 at 12:41:28PM +0100, Vladimir Murzin wrote: > > > It was reported that 72cd4064fcca "NOMMU: Toggle only bits in > > EXC_RETURN we are really care of" breaks NOMMU+XIP combination. > > It happens because saved EXC_RETURN gets overwritten when data > > section is relocated. > > > > The fix is to propagate EXC_RETURN via register and let relocation > > code to commit that value into memory. > > > > Fixes: 72cd4064fcca ("ARM: 8830/1: NOMMU: Toggle only bits in EXC_RETURN we are really care of") > > > > Reported-by: afzal mohammed <afzal.mohd.ma@gmail.com> > > Tested-by: afzal mohammed <afzal.mohd.ma@gmail.com> > > Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> > > Can you please put this into rmk's patch system. > > STM32 Cortex-M boards are currently not booting in mainline, this > change makes them boot again, verified on stm32f429 discovery board. Please check linux-next - or see 8914/1.
Hi Russell, On Sat, Oct 12, 2019 at 08:24:50AM +0100, Russell King - ARM Linux admin wrote: > On Sat, Oct 12, 2019 at 12:07:25PM +0530, afzal mohammed wrote: > > Can you please put this into rmk's patch system. > Please check linux-next - or see 8914/1. Oh sorry, i checked only incoming in the patch system earlier, didn't check the applied one, seeing it there, thanks. Regards afzal
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S index a7810be..4a39828 100644 --- a/arch/arm/kernel/head-common.S +++ b/arch/arm/kernel/head-common.S @@ -68,7 +68,7 @@ ENDPROC(__vet_atags) * The following fragment of code is executed with the MMU on in MMU mode, * and uses absolute addresses; this is not position independent. * - * r0 = cp#15 control register + * r0 = cp#15 control register (exc_ret for M-class) * r1 = machine ID * r2 = atags/dtb pointer * r9 = processor ID @@ -137,7 +137,8 @@ __mmap_switched_data: #ifdef CONFIG_CPU_CP15 .long cr_alignment @ r3 #else - .long 0 @ r3 +M_CLASS(.long exc_ret) @ r3 +AR_CLASS(.long 0) @ r3 #endif .size __mmap_switched_data, . - __mmap_switched_data diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S index afa350f..0fc814b 100644 --- a/arch/arm/kernel/head-nommu.S +++ b/arch/arm/kernel/head-nommu.S @@ -201,6 +201,8 @@ M_CLASS(streq r3, [r12, #PMSAv8_MAIR1]) bic r0, r0, #V7M_SCB_CCR_IC #endif str r0, [r12, V7M_SCB_CCR] + /* Pass exc_ret to __mmap_switched */ + mov r0, r10 #endif /* CONFIG_CPU_CP15 elif CONFIG_CPU_V7M */ ret lr ENDPROC(__after_proc_init) diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S index 1448f14..efebf41 100644 --- a/arch/arm/mm/proc-v7m.S +++ b/arch/arm/mm/proc-v7m.S @@ -136,9 +136,8 @@ __v7m_setup_cont: cpsie i svc #0 1: cpsid i - ldr r0, =exc_ret - orr lr, lr, #EXC_RET_THREADMODE_PROCESSSTACK - str lr, [r0] + /* Calculate exc_ret */ + orr r10, lr, #EXC_RET_THREADMODE_PROCESSSTACK ldmia sp, {r0-r3, r12} str r5, [r12, #11 * 4] @ restore the original SVC vector entry mov lr, r6 @ restore LR