| Message ID | 1570497955-19481-2-git-send-email-Anson.Huang@nxp.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 4a79aed983dc121ffddeff2d154902c61a5d38e2 |
| Headers | show |
| Series | [V2,1/3] arm64: dts: imx8mm-evk: Adjust i2c nodes following alphabetical sort | expand |
Hi Anson, On Mon, Oct 7, 2019 at 10:28 PM Anson Huang <Anson.Huang@nxp.com> wrote: > > Enable i2c3 for i.MX8MM EVK board. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> You could combine this patch with 3/3.
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts index f6d367c..9624d7d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts @@ -244,6 +244,13 @@ }; }; +&i2c3 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + &sai3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai3>; @@ -355,6 +362,13 @@ >; }; + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 + MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 + >; + }; + pinctrl_pmic: pmicirq { fsl,pins = < MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
Enable i2c3 for i.MX8MM EVK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> --- No changes. --- arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+)