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Wed, 27 Nov 2019 11:23:21 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3552B100039; Wed, 27 Nov 2019 11:23:16 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag6node1.st.com [10.75.127.16]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 87F9B2B1213; Wed, 27 Nov 2019 11:23:16 +0100 (CET) Received: from localhost (10.75.127.45) by SFHDAG6NODE1.st.com (10.75.127.16) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 27 Nov 2019 11:23:15 +0100 From: Yannick Fertre To: Yannick Fertre , Philippe Cornu , Benjamin Gaignard , David Airlie , Daniel Vetter , Maxime Coquelin , Alexandre Torgue , , , , Subject: [PATCH] drm/bridge/synopsys: dsi: read status error during transfer Date: Wed, 27 Nov 2019 11:23:13 +0100 Message-ID: <1574850193-13197-1-git-send-email-yannick.fertre@st.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG5NODE3.st.com (10.75.127.15) To SFHDAG6NODE1.st.com (10.75.127.16) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,18.0.572 definitions=2019-11-27_02:2019-11-27,2019-11-27 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191127_022325_888196_1DAD6AA2 X-CRM114-Status: GOOD ( 15.33 ) X-Spam-Score: -0.9 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [62.209.51.94 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Yannick Fertré Read the DSI_INT_ST1 status register to check if errors occur while reading/writing a command to panel. In case of error, the transfer is retried 3 times. Signed-off-by: Yannick Fertre --- drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 99 +++++++++++++++++++++++---- 1 file changed, 85 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c index b6e793b..cc806ba 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c @@ -212,6 +212,20 @@ #define DSI_INT_ST0 0xbc #define DSI_INT_ST1 0xc0 +#define GPRXE BIT(12) +#define GPRDE BIT(11) +#define GPTXE BIT(10) +#define GPWRE BIT(9) +#define GCWRE BIT(8) +#define DPIPLDWE BIT(7) +#define EOTPE BIT(6) +#define PSE BIT(5) +#define CRCE BIT(4) +#define ECCME BIT(3) +#define ECCSE BIT(2) +#define TOLPRX BIT(1) +#define TOHSTX BIT(0) + #define DSI_INT_MSK0 0xc4 #define DSI_INT_MSK1 0xc8 @@ -397,6 +411,42 @@ static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val) return 0; } +static int dw_mipi_dsi_read_status(struct dw_mipi_dsi *dsi) +{ + u32 val; + + val = dsi_read(dsi, DSI_INT_ST1); + + if (val & GPRXE) + DRM_DEBUG_DRIVER("DSI Generic payload receive error\n"); + if (val & GPRDE) + DRM_DEBUG_DRIVER("DSI Generic payload read error\n"); + if (val & GPTXE) + DRM_DEBUG_DRIVER("DSI Generic payload transmit error\n"); + if (val & GPWRE) + DRM_DEBUG_DRIVER("DSI Generic payload write error\n"); + if (val & GCWRE) + DRM_DEBUG_DRIVER("DSI Generic command write error\n"); + if (val & DPIPLDWE) + DRM_DEBUG_DRIVER("DSI DPI payload write error\n"); + if (val & EOTPE) + DRM_DEBUG_DRIVER("DSI EoTp error\n"); + if (val & PSE) + DRM_DEBUG_DRIVER("DSI Packet size error\n"); + if (val & CRCE) + DRM_DEBUG_DRIVER("DSI CRC error\n"); + if (val & ECCME) + DRM_DEBUG_DRIVER("DSI ECC multi-bit error\n"); + if (val & ECCSE) + DRM_DEBUG_DRIVER("DSI ECC single-bit error\n"); + if (val & TOLPRX) + DRM_DEBUG_DRIVER("DSI Timeout low-power reception\n"); + if (val & TOHSTX) + DRM_DEBUG_DRIVER("DSI Timeout high-speed transmission\n"); + + return val; +} + static int dw_mipi_dsi_write(struct dw_mipi_dsi *dsi, const struct mipi_dsi_packet *packet) { @@ -426,6 +476,12 @@ static int dw_mipi_dsi_write(struct dw_mipi_dsi *dsi, "failed to get available write payload FIFO\n"); return ret; } + + val = dw_mipi_dsi_read_status(dsi); + if (val) { + dev_err(dsi->dev, "dsi status error 0x%0x\n", val); + return -EINVAL; + } } word = 0; @@ -459,6 +515,12 @@ static int dw_mipi_dsi_read(struct dw_mipi_dsi *dsi, return ret; } + val = dw_mipi_dsi_read_status(dsi); + if (val) { + dev_err(dsi->dev, "dsi status error 0x%0x\n", val); + return -EINVAL; + } + val = dsi_read(dsi, DSI_GEN_PLD_DATA); for (j = 0; j < 4 && j + i < len; j++) buf[i + j] = val >> (8 * j); @@ -473,6 +535,7 @@ static ssize_t dw_mipi_dsi_host_transfer(struct mipi_dsi_host *host, struct dw_mipi_dsi *dsi = host_to_dsi(host); struct mipi_dsi_packet packet; int ret, nb_bytes; + int retry = 3; ret = mipi_dsi_create_packet(&packet, msg); if (ret) { @@ -484,24 +547,32 @@ static ssize_t dw_mipi_dsi_host_transfer(struct mipi_dsi_host *host, if (dsi->slave) dw_mipi_message_config(dsi->slave, msg); - ret = dw_mipi_dsi_write(dsi, &packet); - if (ret) - return ret; - if (dsi->slave) { - ret = dw_mipi_dsi_write(dsi->slave, &packet); + while (retry--) { + ret = dw_mipi_dsi_write(dsi, &packet); if (ret) - return ret; - } + continue; - if (msg->rx_buf && msg->rx_len) { - ret = dw_mipi_dsi_read(dsi, msg); - if (ret) - return ret; - nb_bytes = msg->rx_len; - } else { - nb_bytes = packet.size; + if (dsi->slave) { + ret = dw_mipi_dsi_write(dsi->slave, &packet); + if (ret) + continue; + } + + if (msg->rx_buf && msg->rx_len) { + ret = dw_mipi_dsi_read(dsi, msg); + if (ret) + continue; + nb_bytes = msg->rx_len; + + } else { + nb_bytes = packet.size; + } + break; } + if (ret) + return ret; + return nb_bytes; }