Message ID | 1576671574-14319-1-git-send-email-peng.fan@nxp.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | b8ab62ff7199fac8ce27fa4a149929034fabe7f8 |
Headers | show |
Series | [V2] arm: dts: imx7ulp: fix reg of cpu node | expand |
On Wed, Dec 18, 2019 at 9:22 AM Peng Fan <peng.fan@nxp.com> wrote: > > From: Peng Fan <peng.fan@nxp.com> > > According to arm cpus binding doc, > " > On 32-bit ARM v7 or later systems this property is > required and matches the CPU MPIDR[23:0] register > bits. > > Bits [23:0] in the reg cell must be set to > bits [23:0] in MPIDR. > > All other bits in the reg cell must be set to 0. > " > > In i.MX7ULP, the MPIDR[23:0] is 0xf00, not 0, so fix it. > Otherwise there will be warning: > "DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map" > > Fixes: 20434dc92c05 ("ARM: dts: imx: add common imx7ulp dtsi support") > Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
On Wed, Dec 18, 2019 at 12:22:32PM +0000, Peng Fan wrote: > From: Peng Fan <peng.fan@nxp.com> > > According to arm cpus binding doc, > " > On 32-bit ARM v7 or later systems this property is > required and matches the CPU MPIDR[23:0] register > bits. > > Bits [23:0] in the reg cell must be set to > bits [23:0] in MPIDR. > > All other bits in the reg cell must be set to 0. > " > > In i.MX7ULP, the MPIDR[23:0] is 0xf00, not 0, so fix it. > Otherwise there will be warning: > "DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map" > > Fixes: 20434dc92c05 ("ARM: dts: imx: add common imx7ulp dtsi support") > Signed-off-by: Peng Fan <peng.fan@nxp.com> For arm32 DTS patches, we use 'ARM: ...' prefix. Fixed it up and applied. Shawn
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi index d37a1927c88e..ab91c98f2124 100644 --- a/arch/arm/boot/dts/imx7ulp.dtsi +++ b/arch/arm/boot/dts/imx7ulp.dtsi @@ -37,10 +37,10 @@ #address-cells = <1>; #size-cells = <0>; - cpu0: cpu@0 { + cpu0: cpu@f00 { compatible = "arm,cortex-a7"; device_type = "cpu"; - reg = <0>; + reg = <0xf00>; }; };