clk: imx: imx8mp: add ocotp root clk

Commit Message

Peng Fan Jan. 19, 2020, 10:12 a.m. UTC

From: Peng Fan <[e-mail]>

Add ocotp root clk, then when using nvmem to read fuse, clk
could be managed.

Signed-off-by: Peng Fan <[e-mail]>
---
 drivers/clk/imx/clk-imx8mp.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Shawn Guo Feb. 14, 2020, 1:50 a.m. UTC | #1

On Sun, Jan 19, 2020 at 10:12:46AM +0000, Peng Fan wrote:
> From: Peng Fan <[e-mail]>
> 
> Add ocotp root clk, then when using nvmem to read fuse, clk
> could be managed.
> 
> Signed-off-by: Peng Fan <[e-mail]>

Applied, thanks.

Patch

diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index f6c120cca0d4..ee83aa2162d9 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -671,6 +671,7 @@  static int imx8mp_clocks_probe(struct platform_device *pdev)
 	hws[IMX8MP_CLK_I2C2_ROOT] = imx_clk_hw_gate4("i2c2_root_clk", "i2c2", ccm_base + 0x4180, 0);
 	hws[IMX8MP_CLK_I2C3_ROOT] = imx_clk_hw_gate4("i2c3_root_clk", "i2c3", ccm_base + 0x4190, 0);
 	hws[IMX8MP_CLK_I2C4_ROOT] = imx_clk_hw_gate4("i2c4_root_clk", "i2c4", ccm_base + 0x41a0, 0);
+	hws[IMX8MP_CLK_OCOTP_ROOT] = imx_clk_hw_gate4("ocotp_root_clk", "ipg_root", ccm_base + 0x4220, 0);
 	hws[IMX8MP_CLK_PCIE_ROOT] = imx_clk_hw_gate4("pcie_root_clk", "pcie_aux", ccm_base + 0x4250, 0);
 	hws[IMX8MP_CLK_PWM1_ROOT] = imx_clk_hw_gate4("pwm1_root_clk", "pwm1", ccm_base + 0x4280, 0);
 	hws[IMX8MP_CLK_PWM2_ROOT] = imx_clk_hw_gate4("pwm2_root_clk", "pwm2", ccm_base + 0x4290, 0);