Message ID | 1579601001-5711-11-git-send-email-claudiu.beznea@microchip.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | 7cb290d3dd559dff5028b9418a31ecb99988f640 |
Headers | show
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Series |
rework at91-reset driver
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expand
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diff --git a/drivers/power/reset/at91-reset.c b/drivers/power/reset/at91-reset.c index dc48f6850796..3b1d566350f4 100644 --- a/drivers/power/reset/at91-reset.c +++ b/drivers/power/reset/at91-reset.c @@ -113,8 +113,8 @@ static int at91sam9g45_restart(struct notifier_block *this, unsigned long mode, "beq 1f\n\t" /* Then, test that the RAM controller is enabled */ - "ldr r0, [%1]\n\t" - "cmp r0, #0\n\t" + "ldr r4, [%1]\n\t" + "cmp r4, #0\n\t" /* Align to cache lines */ ".balign 32\n\t" @@ -138,7 +138,7 @@ static int at91sam9g45_restart(struct notifier_block *this, unsigned long mode, "r" (1), "r" cpu_to_le32(AT91_DDRSDRC_LPCB_POWER_DOWN), "r" (reset->args) - : "r0"); + : "r4"); return NOTIFY_DONE; }
Use r4 as temporary register. On ARM r0-r3 should be used to hold function arguments. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> --- drivers/power/reset/at91-reset.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)