Message ID | 1579876505-113251-8-git-send-email-john.garry@huawei.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | perf pmu-events: Support event aliasing for system PMUs | expand |
diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/smmu-v3-pmcg.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/smmu-v3-pmcg.json new file mode 100644 index 000000000000..ff2414a5ebc4 --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/smmu-v3-pmcg.json @@ -0,0 +1,9 @@ +[ + { + "EventCode": "0x8a", + "EventName": "smmuv3_pmcg.l1_tlb", + "BriefDescription": "SMMUv3 PMCG l1_tlb", + "PublicDescription": "SMMUv3 PMCG l1_tlb", + "Unit": "smmuv3_pmcg" + }, +] diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index da6430c0d184..01541825a6c7 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -239,6 +239,8 @@ static struct map { { "hisi_sccl,ddrc", "hisi_sccl,ddrc" }, { "hisi_sccl,hha", "hisi_sccl,hha" }, { "hisi_sccl,l3c", "hisi_sccl,l3c" }, + /* it's not realistic to keep adding these, we need something more scalable ... */ + { "smmuv3_pmcg", "smmuv3_pmcg" }, { "L3PMC", "amd_l3" }, {} };
Add the SMMUv3 PMCG (Performance Monitor Event Group) implementation defined events for hip08 platform. Only a single event is added, but this is just an example for now. Signed-off-by: John Garry <john.garry@huawei.com> --- .../arch/arm64/hisilicon/hip08/sys/smmu-v3-pmcg.json | 9 +++++++++ tools/perf/pmu-events/jevents.c | 2 ++ 2 files changed, 11 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip08/sys/smmu-v3-pmcg.json