diff mbox series

[v2,2/2] ARM: dts: aspeed: ast2600: Fix SCU IRQ controller nodes

Message ID 1581363147-19310-3-git-send-email-eajames@linux.ibm.com (mailing list archive)
State New, archived
Headers show
Series ARM: dts: aspeed: Fix SCU IRQ controller node addresses | expand

Commit Message

Eddie James Feb. 10, 2020, 7:32 p.m. UTC
The nodes were defined with a unit address but had no reg property,
resulting in a warning. Add the reg properties for consistency to fix
the warning.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
---
 arch/arm/boot/dts/aspeed-g6.dtsi | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

Comments

Andrew Jeffery Feb. 16, 2020, 11:54 p.m. UTC | #1
On Tue, 11 Feb 2020, at 06:02, Eddie James wrote:
> The nodes were defined with a unit address but had no reg property,
> resulting in a warning. Add the reg properties for consistency to fix
> the warning.
> 
> Signed-off-by: Eddie James <eajames@linux.ibm.com>

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>

> ---
>  arch/arm/boot/dts/aspeed-g6.dtsi | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
> index 82a3cd1..301fdb4 100644
> --- a/arch/arm/boot/dts/aspeed-g6.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
> @@ -269,16 +269,18 @@
>  					reg = <0x180 0x40>;
>  				};
>  
> -				scu_ic0: interrupt-controller@0 {
> +				scu_ic0: interrupt-controller@560 {
>  					#interrupt-cells = <1>;
>  					compatible = "aspeed,ast2600-scu-ic0";
> +					reg = <0x560 0x4>;
>  					interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
>  					interrupt-controller;
>  				};
>  
> -				scu_ic1: interrupt-controller@1 {
> +				scu_ic1: interrupt-controller@570 {
>  					#interrupt-cells = <1>;
>  					compatible = "aspeed,ast2600-scu-ic1";
> +					reg = <0x570 0x4>;
>  					interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
>  					interrupt-controller;
>  				};
> -- 
> 1.8.3.1
> 
>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 82a3cd1..301fdb4 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -269,16 +269,18 @@ 
 					reg = <0x180 0x40>;
 				};
 
-				scu_ic0: interrupt-controller@0 {
+				scu_ic0: interrupt-controller@560 {
 					#interrupt-cells = <1>;
 					compatible = "aspeed,ast2600-scu-ic0";
+					reg = <0x560 0x4>;
 					interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 					interrupt-controller;
 				};
 
-				scu_ic1: interrupt-controller@1 {
+				scu_ic1: interrupt-controller@570 {
 					#interrupt-cells = <1>;
 					compatible = "aspeed,ast2600-scu-ic1";
+					reg = <0x570 0x4>;
 					interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 					interrupt-controller;
 				};