| Message ID | 1582897461-15105-9-git-send-email-dennis-yc.hsieh@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | support gce on mt6779 platform | expand |
Hi, Dennis: On Fri, 2020-02-28 at 21:44 +0800, Dennis YC Hsieh wrote: > add write_s function in cmdq helper functions which > writes value contains in internal register to address > with large dma access support. > Reviewed-by: CK Hu <ck.hu@mediatek.com> > Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com> > --- > drivers/soc/mediatek/mtk-cmdq-helper.c | 34 +++++++++++++++++++++++- > include/linux/mailbox/mtk-cmdq-mailbox.h | 2 ++ > include/linux/soc/mediatek/mtk-cmdq.h | 20 ++++++++++++++ > 3 files changed, 55 insertions(+), 1 deletion(-) > > diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c > index 8342a5c94bc7..68b42c935fe6 100644 > --- a/drivers/soc/mediatek/mtk-cmdq-helper.c > +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c > @@ -18,6 +18,10 @@ struct cmdq_instruction { > union { > u32 value; > u32 mask; > + struct { > + u16 arg_c; > + u16 src_reg; > + }; > }; > union { > u16 offset; > @@ -29,7 +33,7 @@ struct cmdq_instruction { > struct { > u8 sop:5; > u8 arg_c_t:1; > - u8 arg_b_t:1; > + u8 src_t:1; > u8 dst_t:1; > }; > }; > @@ -222,6 +226,34 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, > } > EXPORT_SYMBOL(cmdq_pkt_write_mask); > > +int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, > + u16 addr_low, u16 src_reg_idx, u32 mask) > +{ > + struct cmdq_instruction inst = { {0} }; > + int err; > + > + if (mask != U32_MAX) { > + inst.op = CMDQ_CODE_MASK; > + inst.mask = ~mask; > + err = cmdq_pkt_append_command(pkt, inst); > + if (err < 0) > + return err; > + > + inst.mask = 0; > + inst.op = CMDQ_CODE_WRITE_S_MASK; > + } else { > + inst.op = CMDQ_CODE_WRITE_S; > + } > + > + inst.src_t = CMDQ_REG_TYPE; > + inst.sop = high_addr_reg_idx; > + inst.offset = addr_low; > + inst.src_reg = src_reg_idx; > + > + return cmdq_pkt_append_command(pkt, inst); > +} > +EXPORT_SYMBOL(cmdq_pkt_write_s); > + > int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event) > { > struct cmdq_instruction inst = { {0} }; > diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h > index 121c3bb6d3de..8ef87e1bd03b 100644 > --- a/include/linux/mailbox/mtk-cmdq-mailbox.h > +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h > @@ -59,6 +59,8 @@ enum cmdq_code { > CMDQ_CODE_JUMP = 0x10, > CMDQ_CODE_WFE = 0x20, > CMDQ_CODE_EOC = 0x40, > + CMDQ_CODE_WRITE_S = 0x90, > + CMDQ_CODE_WRITE_S_MASK = 0x91, > CMDQ_CODE_LOGIC = 0xa0, > }; > > diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h > index 83340211e1d3..c72d826d8934 100644 > --- a/include/linux/soc/mediatek/mtk-cmdq.h > +++ b/include/linux/soc/mediatek/mtk-cmdq.h > @@ -12,6 +12,8 @@ > #include <linux/timer.h> > > #define CMDQ_NO_TIMEOUT 0xffffffffu > +#define CMDQ_ADDR_HIGH(addr) ((u32)(((addr) >> 16) & GENMASK(31, 0))) > +#define CMDQ_ADDR_LOW(addr) ((u16)(addr) | BIT(1)) > > struct cmdq_pkt; > > @@ -102,6 +104,24 @@ int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value); > int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, > u16 offset, u32 value, u32 mask); > > +/** > + * cmdq_pkt_write_s() - append write_s command to the CMDQ packet > + * @pkt: the CMDQ packet > + * @high_addr_reg_idx: internal regisger ID which contains high address of pa > + * @addr_low: low address of pa > + * @src_reg_idx: the CMDQ internal register ID which cache source value > + * @mask: the specified target address mask, use U32_MAX if no need > + * > + * Return: 0 for success; else the error code is returned > + * > + * Support write value to physical address without subsys. Use CMDQ_ADDR_HIGH() > + * to get high addrees and call cmdq_pkt_assign() to assign value into internal > + * reg. Also use CMDQ_ADDR_LOW() to get low address for addr_low parameterwhen > + * call to this function. > + */ > +int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, > + u16 addr_low, u16 src_reg_idx, u32 mask); > + > /** > * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet > * @pkt: the CMDQ packet
diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c index 8342a5c94bc7..68b42c935fe6 100644 --- a/drivers/soc/mediatek/mtk-cmdq-helper.c +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c @@ -18,6 +18,10 @@ struct cmdq_instruction { union { u32 value; u32 mask; + struct { + u16 arg_c; + u16 src_reg; + }; }; union { u16 offset; @@ -29,7 +33,7 @@ struct cmdq_instruction { struct { u8 sop:5; u8 arg_c_t:1; - u8 arg_b_t:1; + u8 src_t:1; u8 dst_t:1; }; }; @@ -222,6 +226,34 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, } EXPORT_SYMBOL(cmdq_pkt_write_mask); +int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, + u16 addr_low, u16 src_reg_idx, u32 mask) +{ + struct cmdq_instruction inst = { {0} }; + int err; + + if (mask != U32_MAX) { + inst.op = CMDQ_CODE_MASK; + inst.mask = ~mask; + err = cmdq_pkt_append_command(pkt, inst); + if (err < 0) + return err; + + inst.mask = 0; + inst.op = CMDQ_CODE_WRITE_S_MASK; + } else { + inst.op = CMDQ_CODE_WRITE_S; + } + + inst.src_t = CMDQ_REG_TYPE; + inst.sop = high_addr_reg_idx; + inst.offset = addr_low; + inst.src_reg = src_reg_idx; + + return cmdq_pkt_append_command(pkt, inst); +} +EXPORT_SYMBOL(cmdq_pkt_write_s); + int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event) { struct cmdq_instruction inst = { {0} }; diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h index 121c3bb6d3de..8ef87e1bd03b 100644 --- a/include/linux/mailbox/mtk-cmdq-mailbox.h +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h @@ -59,6 +59,8 @@ enum cmdq_code { CMDQ_CODE_JUMP = 0x10, CMDQ_CODE_WFE = 0x20, CMDQ_CODE_EOC = 0x40, + CMDQ_CODE_WRITE_S = 0x90, + CMDQ_CODE_WRITE_S_MASK = 0x91, CMDQ_CODE_LOGIC = 0xa0, }; diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index 83340211e1d3..c72d826d8934 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -12,6 +12,8 @@ #include <linux/timer.h> #define CMDQ_NO_TIMEOUT 0xffffffffu +#define CMDQ_ADDR_HIGH(addr) ((u32)(((addr) >> 16) & GENMASK(31, 0))) +#define CMDQ_ADDR_LOW(addr) ((u16)(addr) | BIT(1)) struct cmdq_pkt; @@ -102,6 +104,24 @@ int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value); int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value, u32 mask); +/** + * cmdq_pkt_write_s() - append write_s command to the CMDQ packet + * @pkt: the CMDQ packet + * @high_addr_reg_idx: internal regisger ID which contains high address of pa + * @addr_low: low address of pa + * @src_reg_idx: the CMDQ internal register ID which cache source value + * @mask: the specified target address mask, use U32_MAX if no need + * + * Return: 0 for success; else the error code is returned + * + * Support write value to physical address without subsys. Use CMDQ_ADDR_HIGH() + * to get high addrees and call cmdq_pkt_assign() to assign value into internal + * reg. Also use CMDQ_ADDR_LOW() to get low address for addr_low parameterwhen + * call to this function. + */ +int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, + u16 addr_low, u16 src_reg_idx, u32 mask); + /** * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet * @pkt: the CMDQ packet
add write_s function in cmdq helper functions which writes value contains in internal register to address with large dma access support. Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com> --- drivers/soc/mediatek/mtk-cmdq-helper.c | 34 +++++++++++++++++++++++- include/linux/mailbox/mtk-cmdq-mailbox.h | 2 ++ include/linux/soc/mediatek/mtk-cmdq.h | 20 ++++++++++++++ 3 files changed, 55 insertions(+), 1 deletion(-)