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X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [40.107.15.83 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.0 MSGID_FROM_MTA_HEADER Message-Id was added by a relay X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Peng Fan , Anson.Huang@nxp.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-imx@nxp.com, kernel@pengutronix.de, festevam@gmail.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Peng Fan Add nvmem related property for cpu0, then nvmem API could be used to read cpu speed grading to avoid directly read OCOTP registers mapped which could not handle defer probe. Signed-off-by: Peng Fan --- V2: Drop useless blankline arch/arm/boot/dts/imx6dl.dtsi | 2 ++ arch/arm/boot/dts/imx6q.dtsi | 2 ++ arch/arm/boot/dts/imx6qdl.dtsi | 6 ++++++ arch/arm/boot/dts/imx6sl.dtsi | 8 ++++++++ arch/arm/boot/dts/imx6sll.dtsi | 6 ++++++ arch/arm/boot/dts/imx6sx.dtsi | 6 ++++++ 6 files changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index 4b3a128d9260..055f1d875bac 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -44,6 +44,8 @@ arm-supply = <®_arm>; pu-supply = <®_pu>; soc-supply = <®_soc>; + nvmem-cells = <&cpu_speed_grade>; + nvmem-cell-names = "speed_grade"; }; cpu@1 { diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 0fad13f9d336..d3ba9d4a1290 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -49,6 +49,8 @@ arm-supply = <®_arm>; pu-supply = <®_pu>; soc-supply = <®_soc>; + nvmem-cells = <&cpu_speed_grade>; + nvmem-cell-names = "speed_grade"; }; cpu1: cpu@1 { diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 70fb8b56b1d7..303131200675 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -1165,6 +1165,12 @@ compatible = "fsl,imx6q-ocotp", "syscon"; reg = <0x021bc000 0x4000>; clocks = <&clks IMX6QDL_CLK_IIM>; + #address-cells = <1>; + #size-cells = <1>; + + cpu_speed_grade: speed-grade@10 { + reg = <0x10 4>; + }; }; tzasc@21d0000 { /* TZASC1 */ diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index c8ec46fe8302..ae75fde8877a 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -74,6 +74,8 @@ arm-supply = <®_arm>; pu-supply = <®_pu>; soc-supply = <®_soc>; + nvmem-cells = <&cpu_speed_grade>; + nvmem-cell-names = "speed_grade"; }; }; @@ -953,6 +955,12 @@ compatible = "fsl,imx6sl-ocotp", "syscon"; reg = <0x021bc000 0x4000>; clocks = <&clks IMX6SL_CLK_OCOTP>; + #address-cells = <1>; + #size-cells = <1>; + + cpu_speed_grade: speed-grade@10 { + reg = <0x10 4>; + }; }; audmux: audmux@21d8000 { diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi index 797f850492fe..6b7fb3cec9f6 100644 --- a/arch/arm/boot/dts/imx6sll.dtsi +++ b/arch/arm/boot/dts/imx6sll.dtsi @@ -72,6 +72,8 @@ <&clks IMX6SLL_CLK_PLL1_SYS>; clock-names = "arm", "pll2_pfd2_396m", "step", "pll1_sw", "pll1_sys"; + nvmem-cells = <&cpu_speed_grade>; + nvmem-cell-names = "speed_grade"; }; }; @@ -791,6 +793,10 @@ reg = <0x021bc000 0x4000>; clocks = <&clks IMX6SLL_CLK_OCOTP>; + cpu_speed_grade: speed-grade@10 { + reg = <0x10 4>; + }; + tempmon_calib: calib@38 { reg = <0x38 4>; }; diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index e47d346a3543..63aa19d81b42 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -87,6 +87,8 @@ "pll1_sw", "pll1_sys"; arm-supply = <®_arm>; soc-supply = <®_soc>; + nvmem-cells = <&cpu_speed_grade>; + nvmem-cell-names = "speed_grade"; }; }; @@ -1058,6 +1060,10 @@ reg = <0x021bc000 0x4000>; clocks = <&clks IMX6SX_CLK_OCOTP>; + cpu_speed_grade: speed-grade@10 { + reg = <0x10 4>; + }; + tempmon_calib: calib@38 { reg = <0x38 4>; };