| Message ID | 1584502004-11349-1-git-send-email-Anson.Huang@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | clk: imx: clk-pllv3: Use readl_poll_timeout() for PLL lock wait | expand |
On 20-03-18 11:26:44, Anson Huang wrote: > Use readl_poll_timeout() for PLL lock wait which can simplify the > code a lot. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> > --- > drivers/clk/imx/clk-pllv3.c | 16 +++++----------- > 1 file changed, 5 insertions(+), 11 deletions(-) > > diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c > index df91a82..3dfa9c3 100644 > --- a/drivers/clk/imx/clk-pllv3.c > +++ b/drivers/clk/imx/clk-pllv3.c > @@ -7,6 +7,7 @@ > #include <linux/clk-provider.h> > #include <linux/delay.h> > #include <linux/io.h> > +#include <linux/iopoll.h> > #include <linux/slab.h> > #include <linux/jiffies.h> > #include <linux/err.h> > @@ -25,6 +26,8 @@ > #define IMX7_ENET_PLL_POWER (0x1 << 5) > #define IMX7_DDR_PLL_POWER (0x1 << 20) > > +#define PLL_LOCK_TIMEOUT 10000 > + > /** > * struct clk_pllv3 - IMX PLL clock version 3 > * @clk_hw: clock source > @@ -53,23 +56,14 @@ struct clk_pllv3 { > > static int clk_pllv3_wait_lock(struct clk_pllv3 *pll) > { > - unsigned long timeout = jiffies + msecs_to_jiffies(10); > u32 val = readl_relaxed(pll->base) & pll->power_bit; > > /* No need to wait for lock when pll is not powered up */ > if ((pll->powerup_set && !val) || (!pll->powerup_set && val)) > return 0; > > - /* Wait for PLL to lock */ > - do { > - if (readl_relaxed(pll->base) & BM_PLL_LOCK) > - break; > - if (time_after(jiffies, timeout)) > - break; > - usleep_range(50, 500); > - } while (1); > - > - return readl_relaxed(pll->base) & BM_PLL_LOCK ? 0 : -ETIMEDOUT; > + return readl_poll_timeout(pll->base, val, val & BM_PLL_LOCK, 500, > + PLL_LOCK_TIMEOUT); > } > > static int clk_pllv3_prepare(struct clk_hw *hw) > -- > 2.7.4 >
Quoting Anson Huang (2020-03-17 20:26:44) > diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c > index df91a82..3dfa9c3 100644 > --- a/drivers/clk/imx/clk-pllv3.c > +++ b/drivers/clk/imx/clk-pllv3.c > @@ -53,23 +56,14 @@ struct clk_pllv3 { > > static int clk_pllv3_wait_lock(struct clk_pllv3 *pll) > { > - unsigned long timeout = jiffies + msecs_to_jiffies(10); > u32 val = readl_relaxed(pll->base) & pll->power_bit; > > /* No need to wait for lock when pll is not powered up */ > if ((pll->powerup_set && !val) || (!pll->powerup_set && val)) > return 0; > > - /* Wait for PLL to lock */ > - do { > - if (readl_relaxed(pll->base) & BM_PLL_LOCK) > - break; > - if (time_after(jiffies, timeout)) > - break; > - usleep_range(50, 500); > - } while (1); > - > - return readl_relaxed(pll->base) & BM_PLL_LOCK ? 0 : -ETIMEDOUT; > + return readl_poll_timeout(pll->base, val, val & BM_PLL_LOCK, 500, Did you want to use readl_relaxed_poll_timeout() to keep it the same as before?
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c index df91a82..3dfa9c3 100644 --- a/drivers/clk/imx/clk-pllv3.c +++ b/drivers/clk/imx/clk-pllv3.c @@ -7,6 +7,7 @@ #include <linux/clk-provider.h> #include <linux/delay.h> #include <linux/io.h> +#include <linux/iopoll.h> #include <linux/slab.h> #include <linux/jiffies.h> #include <linux/err.h> @@ -25,6 +26,8 @@ #define IMX7_ENET_PLL_POWER (0x1 << 5) #define IMX7_DDR_PLL_POWER (0x1 << 20) +#define PLL_LOCK_TIMEOUT 10000 + /** * struct clk_pllv3 - IMX PLL clock version 3 * @clk_hw: clock source @@ -53,23 +56,14 @@ struct clk_pllv3 { static int clk_pllv3_wait_lock(struct clk_pllv3 *pll) { - unsigned long timeout = jiffies + msecs_to_jiffies(10); u32 val = readl_relaxed(pll->base) & pll->power_bit; /* No need to wait for lock when pll is not powered up */ if ((pll->powerup_set && !val) || (!pll->powerup_set && val)) return 0; - /* Wait for PLL to lock */ - do { - if (readl_relaxed(pll->base) & BM_PLL_LOCK) - break; - if (time_after(jiffies, timeout)) - break; - usleep_range(50, 500); - } while (1); - - return readl_relaxed(pll->base) & BM_PLL_LOCK ? 0 : -ETIMEDOUT; + return readl_poll_timeout(pll->base, val, val & BM_PLL_LOCK, 500, + PLL_LOCK_TIMEOUT); } static int clk_pllv3_prepare(struct clk_hw *hw)
Use readl_poll_timeout() for PLL lock wait which can simplify the code a lot. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> --- drivers/clk/imx/clk-pllv3.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-)