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Mon, 06 Apr 2020 01:38:14 -0800 Received: from MTKMBS31DR.mediatek.inc (172.27.6.102) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 6 Apr 2020 02:28:07 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by MTKMBS31DR.mediatek.inc (172.27.6.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 6 Apr 2020 17:28:03 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 6 Apr 2020 17:28:02 +0800 From: Chun-Hung Wu To: , Jonathan Hunter , "Al Cooper" , Adrian Hunter , Florian Fainelli , , Andy Gross , Bjorn Andersson , Michal Simek , Thierry Reding , Chaotian Jing , Ulf Hansson , Rob Herring , Mark Rutland , Matthias Brugger , "Linus Walleij" , Pavel Machek , Kate Stewart , Greg Kroah-Hartman , Martin Blumenstingl , Pan Bian , "Thomas Gleixner" , Allison Randal , "Mathieu Malaterre" , Stanley Chu , "Kuohong Wang" Subject: [PATCH 3/5] [3/5] mmc: mediatek: refine msdc timeout api Date: Mon, 6 Apr 2020 17:27:59 +0800 Message-ID: <1586165281-11888-4-git-send-email-chun-hung.wu@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1586165281-11888-1-git-send-email-chun-hung.wu@mediatek.com> References: <1586165281-11888-1-git-send-email-chun-hung.wu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 16F3C6724004E6AA8460B143588F4E3011ADAC7C8487500B14833265BC6D0BD32000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200406_023815_739916_A5634C07 X-CRM114-Status: GOOD ( 11.03 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 MIME_BASE64_TEXT RAW: Message text disguised using base64 encoding -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, wsd_upstream@mediatek.com, linux-arm-msm@vger.kernel.org, Chun-Hung Wu , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-tegra@vger.kernel.org, kernel-team@android.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Extract msdc timeout api common part to have better code architecture and avoid redundent code. Signed-off-by: Chun-Hung Wu --- drivers/mmc/host/mtk-sd.c | 32 ++++++++++++++++++++++---------- 1 file changed, 22 insertions(+), 10 deletions(-) diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index 7726dcf..a2328fb 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -699,21 +699,21 @@ static void msdc_unprepare_data(struct msdc_host *host, struct mmc_request *mrq) } } -/* clock control primitives */ -static void msdc_set_timeout(struct msdc_host *host, u32 ns, u32 clks) +static u64 msdc_timeout_cal(struct msdc_host *host, u64 ns, u64 clks) { - u32 timeout, clk_ns; + u64 timeout, clk_ns; u32 mode = 0; - host->timeout_ns = ns; - host->timeout_clks = clks; if (host->mmc->actual_clock == 0) { timeout = 0; } else { - clk_ns = 1000000000UL / host->mmc->actual_clock; - timeout = (ns + clk_ns - 1) / clk_ns + clks; + clk_ns = 1000000000ULL; + do_div(clk_ns, host->mmc->actual_clock); + timeout = ns + clk_ns - 1; + do_div(timeout, clk_ns); + timeout += clks; /* in 1048576 sclk cycle unit */ - timeout = (timeout + (0x1 << 20) - 1) >> 20; + timeout = DIV_ROUND_UP(timeout, (0x1 << 20)); if (host->dev_comp->clk_div_bits == 8) sdr_get_field(host->base + MSDC_CFG, MSDC_CFG_CKMOD, &mode); @@ -723,9 +723,21 @@ static void msdc_set_timeout(struct msdc_host *host, u32 ns, u32 clks) /*DDR mode will double the clk cycles for data timeout */ timeout = mode >= 2 ? timeout * 2 : timeout; timeout = timeout > 1 ? timeout - 1 : 0; - timeout = timeout > 255 ? 255 : timeout; } - sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, timeout); + return timeout; +} + +/* clock control primitives */ +static void msdc_set_timeout(struct msdc_host *host, u64 ns, u64 clks) +{ + u64 timeout; + + host->timeout_ns = ns; + host->timeout_clks = clks; + + timeout = msdc_timeout_cal(host, ns, clks); + sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, + (u32)(timeout > 255 ? 255 : timeout)); } static void msdc_gate_clock(struct msdc_host *host)