Message ID | 1587817790-21698-1-git-send-email-Anson.Huang@nxp.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | 8c30e7caac7467a89a69b22d1de7b489aa26b8a8 |
Headers | show |
Series | arm64: dts: imx8mn: Update VDD_ARM 1.2GHz setpoint voltage | expand |
On Sat, Apr 25, 2020 at 08:29:50PM +0800, Anson Huang wrote: > The latest datasheet Rev. 0.1, 03/2020 removes below constrain: > > "If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V." > > So, for 1.2GHz setpoint VDD_ARM can use its typical voltage > directly. > > The datasheet can be downloaded from below link: > https://www.nxp.com/docs/en/data-sheet/IMX8MNCEC.pdf > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Applied, thanks.
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index fa78f01..de6e2cf 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -121,7 +121,7 @@ opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <950000>; + opp-microvolt = <850000>; opp-supported-hw = <0xb00>, <0x7>; clock-latency-ns = <150000>; opp-suspend;
The latest datasheet Rev. 0.1, 03/2020 removes below constrain: "If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V." So, for 1.2GHz setpoint VDD_ARM can use its typical voltage directly. The datasheet can be downloaded from below link: https://www.nxp.com/docs/en/data-sheet/IMX8MNCEC.pdf Signed-off-by: Anson Huang <Anson.Huang@nxp.com> --- arch/arm64/boot/dts/freescale/imx8mn.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)