| Message ID | 1589012271-12740-1-git-send-email-Anson.Huang@nxp.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | d0955f66494100d3109c36a3244cc7e374e3a4af |
| Headers | show |
| Series | [1/2] arm64: dts: imx8mq: Add src node interrupts | expand |
> From: Anson Huang <Anson.Huang@nxp.com> > Sent: Saturday, May 9, 2020 4:18 PM > > Interrupts is a required property according to SRC binding, add it for SRC node. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Regards Aisheng
On Sat, May 09, 2020 at 04:17:50PM +0800, Anson Huang wrote: > Interrupts is a required property according to SRC binding, add > it for SRC node. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Applied both, thanks.
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index bab8836..ea8699c 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -602,6 +602,7 @@ src: reset-controller@30390000 { compatible = "fsl,imx8mq-src", "syscon"; reg = <0x30390000 0x10000>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; #reset-cells = <1>; };
Interrupts is a required property according to SRC binding, add it for SRC node. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 1 + 1 file changed, 1 insertion(+)