| Message ID | 1589813260-20036-3-git-send-email-Anson.Huang@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Covert i.MX GPT/TPM/SYSCTR timer binding to json-schema | expand |
> From: Anson Huang <Anson.Huang@nxp.com> > Sent: Monday, May 18, 2020 10:48 PM > > Convert the i.MX TPM binding to DT schema format using json-schema. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > --- > .../devicetree/bindings/timer/nxp,tpm-timer.txt | 28 ---------- > .../devicetree/bindings/timer/nxp,tpm-timer.yaml | 63 > ++++++++++++++++++++++ > 2 files changed, 63 insertions(+), 28 deletions(-) delete mode 100644 > Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt > create mode 100644 > Documentation/devicetree/bindings/timer/nxp,tpm-timer.yaml > > diff --git a/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt > b/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt > deleted file mode 100644 > index f82087b..0000000 > --- a/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt > +++ /dev/null > @@ -1,28 +0,0 @@ > -NXP Low Power Timer/Pulse Width Modulation Module (TPM) > - > -The Timer/PWM Module (TPM) supports input capture, output compare, -and > the generation of PWM signals to control electric motor and power > -management applications. The counter, compare and capture registers -are > clocked by an asynchronous clock that can remain enabled in low -power modes. > TPM can support global counter bus where one TPM drives -the counter bus for > the others, provided bit width is the same. > - > -Required properties: > - > -- compatible : should be "fsl,imx7ulp-tpm" > -- reg : Specifies base physical address and size of the register sets > - for the clock event device and clock source device. > -- interrupts : Should be the clock event device interrupt. > -- clocks : The clocks provided by the SoC to drive the timer, must contain > - an entry for each entry in clock-names. > -- clock-names : Must include the following entries: "ipg" and "per". > - > -Example: > -tpm5: tpm@40260000 { > - compatible = "fsl,imx7ulp-tpm"; > - reg = <0x40260000 0x1000>; > - interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&clks IMX7ULP_CLK_NIC1_BUS_DIV>, > - <&clks IMX7ULP_CLK_LPTPM5>; > - clock-names = "ipg", "per"; > -}; > diff --git a/Documentation/devicetree/bindings/timer/nxp,tpm-timer.yaml > b/Documentation/devicetree/bindings/timer/nxp,tpm-timer.yaml > new file mode 100644 > index 0000000..0d34610 > --- /dev/null > +++ b/Documentation/devicetree/bindings/timer/nxp,tpm-timer.yaml > @@ -0,0 +1,63 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 [...] > + > +title: NXP Low Power Timer/Pulse Width Modulation Module (TPM) > + > +maintainers: > + - Dong Aisheng <aisheng.dong@nxp.com> > + > +description: | > + The Timer/PWM Module (TPM) supports input capture, output compare, > + and the generation of PWM signals to control electric motor and power > + management applications. The counter, compare and capture registers > + are clocked by an asynchronous clock that can remain enabled in low > + power modes. TPM can support global counter bus where one TPM drives > + the counter bus for the others, provided bit width is the same. > + > +properties: > + compatible: > + const: fsl,imx7ulp-tpm > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + items: > + - description: SoC TPM ipg clock > + - description: SoC TPM per clock > + maxItems: 2 Unneeded line > + > + clock-names: > + items: > + - const: ipg > + - const: per > + maxItems: 2 Ditto Otherwise: Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Regards Aisheng > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/imx7ulp-clock.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + timer@40260000 { > + compatible = "fsl,imx7ulp-tpm"; > + reg = <0x40260000 0x1000>; > + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>, > + <&pcc2 IMX7ULP_CLK_LPTPM5>; > + clock-names = "ipg", "per"; > + }; > -- > 2.7.4
diff --git a/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt b/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt deleted file mode 100644 index f82087b..0000000 --- a/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt +++ /dev/null @@ -1,28 +0,0 @@ -NXP Low Power Timer/Pulse Width Modulation Module (TPM) - -The Timer/PWM Module (TPM) supports input capture, output compare, -and the generation of PWM signals to control electric motor and power -management applications. The counter, compare and capture registers -are clocked by an asynchronous clock that can remain enabled in low -power modes. TPM can support global counter bus where one TPM drives -the counter bus for the others, provided bit width is the same. - -Required properties: - -- compatible : should be "fsl,imx7ulp-tpm" -- reg : Specifies base physical address and size of the register sets - for the clock event device and clock source device. -- interrupts : Should be the clock event device interrupt. -- clocks : The clocks provided by the SoC to drive the timer, must contain - an entry for each entry in clock-names. -- clock-names : Must include the following entries: "ipg" and "per". - -Example: -tpm5: tpm@40260000 { - compatible = "fsl,imx7ulp-tpm"; - reg = <0x40260000 0x1000>; - interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX7ULP_CLK_NIC1_BUS_DIV>, - <&clks IMX7ULP_CLK_LPTPM5>; - clock-names = "ipg", "per"; -}; diff --git a/Documentation/devicetree/bindings/timer/nxp,tpm-timer.yaml b/Documentation/devicetree/bindings/timer/nxp,tpm-timer.yaml new file mode 100644 index 0000000..0d34610 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/nxp,tpm-timer.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/nxp,tpm-timer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP Low Power Timer/Pulse Width Modulation Module (TPM) + +maintainers: + - Dong Aisheng <aisheng.dong@nxp.com> + +description: | + The Timer/PWM Module (TPM) supports input capture, output compare, + and the generation of PWM signals to control electric motor and power + management applications. The counter, compare and capture registers + are clocked by an asynchronous clock that can remain enabled in low + power modes. TPM can support global counter bus where one TPM drives + the counter bus for the others, provided bit width is the same. + +properties: + compatible: + const: fsl,imx7ulp-tpm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: SoC TPM ipg clock + - description: SoC TPM per clock + maxItems: 2 + + clock-names: + items: + - const: ipg + - const: per + maxItems: 2 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx7ulp-clock.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + timer@40260000 { + compatible = "fsl,imx7ulp-tpm"; + reg = <0x40260000 0x1000>; + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>, + <&pcc2 IMX7ULP_CLK_LPTPM5>; + clock-names = "ipg", "per"; + };
Convert the i.MX TPM binding to DT schema format using json-schema. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> --- .../devicetree/bindings/timer/nxp,tpm-timer.txt | 28 ---------- .../devicetree/bindings/timer/nxp,tpm-timer.yaml | 63 ++++++++++++++++++++++ 2 files changed, 63 insertions(+), 28 deletions(-) delete mode 100644 Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt create mode 100644 Documentation/devicetree/bindings/timer/nxp,tpm-timer.yaml