| Message ID | 1590998069-28212-1-git-send-email-Anson.Huang@nxp.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | c13168a56560f679e48c8a9bf0e1ce613bc83c39 |
| Headers | show |
| Series | ARM: dts: imx6qdl: Remove invalid interrupt for GPC node | expand |
On Mon, Jun 01, 2020 at 03:54:29PM +0800, Anson Huang wrote: > In latest i.MX6Q RM Rev.6, 05/2020, #90 SPI interrupt is reserved, > so remove it from GPC node. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Applied, thanks.
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index b047403..deb09df 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -871,8 +871,7 @@ reg = <0x020dc000 0x4000>; interrupt-controller; #interrupt-cells = <3>; - interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>, - <0 90 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&intc>; clocks = <&clks IMX6QDL_CLK_IPG>; clock-names = "ipg";
In latest i.MX6Q RM Rev.6, 05/2020, #90 SPI interrupt is reserved, so remove it from GPC node. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> --- arch/arm/boot/dts/imx6qdl.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)